select SPL_REGMAP
select SPL_DM_RESET
select SPL_SERIAL_SUPPORT
+ select SPL_SPI_LOAD
select SPL_SYSCON
- select SPL_WATCHDOG_SUPPORT
+ select SPL_WATCHDOG_SUPPORT if WATCHDOG
imply BOOTSTAGE_STASH if SPL_BOOTSTAGE
imply SPL_BOOTSTAGE if BOOTSTAGE
imply SPL_DISPLAY_PRINT
config ENV_SIZE
default 0x2000
-config TARGET_STM32MP1
- bool "Support stm32mp1xx"
+config STM32MP15x
+ bool "Support STMicroelectronics STM32MP15x Soc"
select ARCH_SUPPORT_PSCI if !STM32MP1_TRUSTED
select CPU_V7A
select CPU_V7_HAS_NONSEC if !STM32MP1_TRUSTED
select PINCTRL_STM32
select STM32_RCC
select STM32_RESET
+ select STM32_SERIAL
select SYS_ARCH_TIMER
- imply BOOTCOUNT_LIMIT
- imply BOOTSTAGE
- imply CMD_BOOTCOUNT
- imply CMD_BOOTSTAGE
imply SYSRESET_PSCI if STM32MP1_TRUSTED
imply SYSRESET_SYSCON if !STM32MP1_TRUSTED
help
- target STMicroelectronics SOC STM32MP1 family
+ support of STMicroelectronics SOC STM32MP15x family
STM32MP157, STM32MP153 or STM32MP151
STMicroelectronics MPU with core ARMv7
dual core A7 for STM32MP157/3, monocore for STM32MP151
+ target all the STMicroelectronics board with SOC STM32MP1 family
+
+choice
+ prompt "STM32MP15x board select"
+ optional
+
+config TARGET_ST_STM32MP15x
+ bool "STMicroelectronics STM32MP15x boards"
+ select STM32MP15x
+ imply BOOTCOUNT_LIMIT
+ imply CMD_BOOTCOUNT
+ imply CMD_CLS if CMD_BMP
+ imply DISABLE_CONSOLE
+ imply PRE_CONSOLE_BUFFER
+ imply SILENT_CONSOLE
+ help
+ target the STMicroelectronics board with SOC STM32MP15x
+ managed by board/st/stm32mp1:
+ Evalulation board (EV1) or Discovery board (DK1 and DK2).
+ The difference between board are managed with devicetree
+
+config TARGET_DH_STM32MP1_PDK2
+ bool "DH STM32MP1 PDK2"
+ select STM32MP15x
+ imply BOOTCOUNT_LIMIT
+ imply CMD_BOOTCOUNT
+ help
+ Target the DH PDK2 development kit with STM32MP15x SoM.
+
+endchoice
config STM32MP1_TRUSTED
bool "Support trusted boot with TF-A"
OP-TEE monitor provides ST SMC to access to secure resources
config SYS_TEXT_BASE
- prompt "U-Boot base address"
default 0xC0100000
- help
- configure the U-Boot base address
- when DDR driver is used:
- DDR + 1MB (0xC0100000)
config NR_DRAM_BANKS
default 1
config STM32_ETZPC
bool "STM32 Extended TrustZone Protection"
- depends on TARGET_STM32MP1
+ depends on STM32MP15x
default y
help
Say y to enable STM32 Extended TrustZone Protection
fuse public key hash in corresponding fuse used to authenticate
binary.
+
+config PRE_CON_BUF_ADDR
+ default 0xC02FF000
+
+config PRE_CON_BUF_SZ
+ default 4096
+
config BOOTSTAGE_STASH_ADDR
default 0xC3000000
endif
source "board/st/stm32mp1/Kconfig"
+source "board/dhelectronics/dh_stm32mp1/Kconfig"
endif