arm: socfpga: Add pinmux for Arria 10

[oweals/u-boot.git] / arch / arm / mach-socfpga / spl.c

diff --git a/arch/arm/mach-socfpga/spl.c b/arch/arm/mach-socfpga/spl.c
index 13ec24bc169ef2ffb32fe4affa58985756dee5c6..0064fc8a9d5afe7b00aad60658b9124d348a6b91 100644 (file)
--- a/arch/arm/mach-socfpga/spl.c
+++ b/arch/arm/mach-socfpga/spl.c
@@ -40,6 +40,7 @@ u32 spl_boot_device(void)
                return BOOT_DEVICE_RAM;
        case 0x2:       /* NAND Flash (1.8V) */
        case 0x3:       /* NAND Flash (3.0V) */
+               socfpga_per_reset(SOCFPGA_RESET(NAND), 0);
                return BOOT_DEVICE_NAND;
        case 0x4:       /* SD/MMC External Transceiver (1.8V) */
        case 0x5:       /* SD/MMC Internal Transceiver (3.0V) */
@@ -57,7 +58,7 @@ u32 spl_boot_device(void)
 }
 
 #ifdef CONFIG_SPL_MMC_SUPPORT
-u32 spl_boot_mode(void)
+u32 spl_boot_mode(const u32 boot_device)
 {
 #if defined(CONFIG_SPL_FAT_SUPPORT) || defined(CONFIG_SPL_EXT_SUPPORT)
        return MMCSD_MODE_FS;
@@ -126,7 +127,8 @@ void board_init_f(ulong dummy)
 
        debug("Reconfigure Clock Manager\n");
        /* reconfigure the PLLs */
-       cm_basic_init(cm_default_cfg);
+       if (cm_basic_init(cm_default_cfg))
+               hang();
 
        /* Enable bootrom to configure IOs. */
        sysmgr_config_warmrstcfgio(1);
@@ -180,6 +182,4 @@ void board_init_f(ulong dummy)
 
        /* Configure simple malloc base pointer into RAM. */
        gd->malloc_base = CONFIG_SYS_TEXT_BASE + (1024 * 1024);
-
-       board_init_r(NULL, 0);
 }