rockchip: Migrate to use BOOTROM_SUPPORT driver

[oweals/u-boot.git] / arch / arm / mach-socfpga / reset_manager_s10.c

diff --git a/arch/arm/mach-socfpga/reset_manager_s10.c b/arch/arm/mach-socfpga/reset_manager_s10.c
index f8dd787cc6ae41069222d96e1d7f362ba81b0501..499a84aff53f1eaed10d88c2c4e7ccf2b62d868e 100644 (file)
--- a/arch/arm/mach-socfpga/reset_manager_s10.c
+++ b/arch/arm/mach-socfpga/reset_manager_s10.c
@@ -61,7 +61,7 @@ void socfpga_bridges_reset(int enable)
                /* clear idle request to all bridges */
                setbits_le32(&system_manager_base->noc_idlereq_clr, ~0);
 
-               /* Release bridges from reset state per handoff value */
+               /* Release all bridges from reset state */
                clrbits_le32(&reset_manager_base->brgmodrst, ~0);
 
                /* Poll until all idleack to 0 */
@@ -84,26 +84,16 @@ void socfpga_bridges_reset(int enable)
                        (SYSMGR_NOC_H2F_MSK | SYSMGR_NOC_LWH2F_MSK)))
                        ;
 
-               /* Put all bridges (except NOR DDR scheduler) into reset */
+               /* Reset all bridges (except NOR DDR scheduler & F2S) */
                setbits_le32(&reset_manager_base->brgmodrst,
-                            ~RSTMGR_BRGMODRST_DDRSCH_MASK);
+                            ~(RSTMGR_BRGMODRST_DDRSCH_MASK |
+                            RSTMGR_BRGMODRST_FPGA2SOC_MASK));
 
                /* Disable NOC timeout */
                writel(0, &system_manager_base->noc_timeout);
        }
 }
 
-/*
- * Release peripherals from reset based on handoff
- */
-void reset_deassert_peripherals_handoff(void)
-{
-       writel(0, &reset_manager_base->per1modrst);
-       /* Enable OCP first */
-       writel(~RSTMGR_PER0MODRST_OCP_MASK, &reset_manager_base->per0modrst);
-       writel(0, &reset_manager_base->per0modrst);
-}
-
 /*
  * Return non-zero if the CPU has been warm reset
  */