Merge git://git.denx.de/u-boot-dm

[oweals/u-boot.git] / arch / arm / mach-socfpga / Kconfig

diff --git a/arch/arm/mach-socfpga/Kconfig b/arch/arm/mach-socfpga/Kconfig
index f6e5773272d64ae81f3274414f0ca136191f3cc7..45e5379d566c58fbb5b1fb068206ec2a4193fe39 100644 (file)
--- a/arch/arm/mach-socfpga/Kconfig
+++ b/arch/arm/mach-socfpga/Kconfig
@@ -37,6 +37,10 @@ config TARGET_SOCFPGA_ARRIA5
        bool
        select TARGET_SOCFPGA_GEN5
 
+config TARGET_SOCFPGA_ARRIA10
+       bool
+       select SPL_BOARD_INIT if SPL
+
 config TARGET_SOCFPGA_CYCLONE5
        bool
        select TARGET_SOCFPGA_GEN5
@@ -49,6 +53,10 @@ choice
        prompt "Altera SOCFPGA board select"
        optional
 
+config TARGET_SOCFPGA_ARRIA10_SOCDK
+       bool "Altera SOCFPGA SoCDK (Arria 10)"
+       select TARGET_SOCFPGA_ARRIA10
+
 config TARGET_SOCFPGA_ARRIA5_SOCDK
        bool "Altera SOCFPGA SoCDK (Arria V)"
        select TARGET_SOCFPGA_ARRIA5
@@ -98,6 +106,7 @@ endchoice
 
 config SYS_BOARD
        default "arria5-socdk" if TARGET_SOCFPGA_ARRIA5_SOCDK
+       default "arria10-socdk" if TARGET_SOCFPGA_ARRIA10_SOCDK
        default "cyclone5-socdk" if TARGET_SOCFPGA_CYCLONE5_SOCDK
        default "de0-nano-soc" if TARGET_SOCFPGA_TERASIC_DE0_NANO
        default "de1-soc" if TARGET_SOCFPGA_TERASIC_DE1_SOC
@@ -111,6 +120,7 @@ config SYS_BOARD
 
 config SYS_VENDOR
        default "altera" if TARGET_SOCFPGA_ARRIA5_SOCDK
+       default "altera" if TARGET_SOCFPGA_ARRIA10_SOCDK
        default "altera" if TARGET_SOCFPGA_CYCLONE5_SOCDK
        default "aries" if TARGET_SOCFPGA_ARIES_MCVEVK
        default "ebv" if TARGET_SOCFPGA_EBV_SOCRATES
@@ -125,6 +135,7 @@ config SYS_SOC
 
 config SYS_CONFIG_NAME
        default "socfpga_arria5_socdk" if TARGET_SOCFPGA_ARRIA5_SOCDK
+       default "socfpga_arria10_socdk" if TARGET_SOCFPGA_ARRIA10_SOCDK
        default "socfpga_cyclone5_socdk" if TARGET_SOCFPGA_CYCLONE5_SOCDK
        default "socfpga_de0_nano_soc" if TARGET_SOCFPGA_TERASIC_DE0_NANO
        default "socfpga_de1_soc" if TARGET_SOCFPGA_TERASIC_DE1_SOC