* SPDX-License-Identifier: GPL-2.0+
*/
+#include <clk.h>
#include <common.h>
#include <debug_uart.h>
#include <dm.h>
return MMCSD_MODE_RAW;
}
+static int setup_arm_clock(void)
+{
+ struct udevice *dev;
+ struct clk clk;
+ int ret;
+
+ ret = rockchip_get_clk(&dev);
+ if (ret)
+ return ret;
+
+ clk.id = CLK_ARM;
+ ret = clk_request(dev, &clk);
+ if (ret < 0)
+ return ret;
+
+ ret = clk_set_rate(&clk, 600000000);
+
+ clk_free(&clk);
+ return ret;
+}
+
void board_init_f(ulong dummy)
{
struct udevice *pinctrl, *dev;
printch('\n');
#endif
- ret = spl_init();
+ ret = spl_early_init();
if (ret) {
- debug("spl_init() failed: %d\n", ret);
+ debug("spl_early_init() failed: %d\n", ret);
hang();
}
*/
pmu = syscon_get_first_range(ROCKCHIP_SYSCON_PMU);
if (IS_ERR(pmu))
- error("pmu syscon returned %ld\n", PTR_ERR(pmu));
+ pr_err("pmu syscon returned %ld\n", PTR_ERR(pmu));
SAVE_SP_ADDR = readl(&pmu->sys_reg[2]);
ret = uclass_get_device(UCLASS_PINCTRL, 0, &pinctrl);
return;
}
-#if defined(CONFIG_ROCKCHIP_SPL_BACK_TO_BROM) && !defined(CONFIG_SPL_BOARD_INIT)
+ setup_arm_clock();
+#if CONFIG_IS_ENABLED(ROCKCHIP_BACK_TO_BROM) && !defined(CONFIG_SPL_BOARD_INIT)
back_to_bootrom();
#endif
}
}
preloader_console_init();
-#ifdef CONFIG_ROCKCHIP_SPL_BACK_TO_BROM
+#if CONFIG_IS_ENABLED(ROCKCHIP_BACK_TO_BROM)
back_to_bootrom();
#endif
return;