Merge git://git.denx.de/u-boot-mpc85xx
[oweals/u-boot.git] / arch / arm / mach-omap2 / omap5 / hw_data.c
index fc9913582480a4f29a941f61afc5f5ee29602c67..58991d7d0484e9026ab996f463ddecf9b29a56ff 100644 (file)
@@ -336,31 +336,47 @@ struct pmic_data tps659038 = {
        .gpio_en = 0,
 };
 
+/* The LP8732 and LP8733 are software-compatible, use common struct */
+struct pmic_data lp8733 = {
+       .base_offset = LP873X_BUCK_BASE_VOLT_UV,
+       .step = 5000, /* 5 mV represented in uV */
+       /*
+        * Offset codes 0 - 0x13 Invalid.
+        * Offset codes 0x14 0x17 give 10mV steps
+        * Offset codes 0x17 through 0x9D give 5mV steps
+        * So let us start with our operating range from .73V
+        */
+       .start_code = 0x17,
+       .i2c_slave_addr = 0x60,
+       .pmic_bus_init  = gpi2c_init,
+       .pmic_write     = palmas_i2c_write_u8,
+};
+
 struct vcores_data omap5430_volts = {
-       .mpu.value = VDD_MPU,
+       .mpu.value[OPP_NOM] = VDD_MPU,
        .mpu.addr = SMPS_REG_ADDR_12_MPU,
        .mpu.pmic = &palmas,
 
-       .core.value = VDD_CORE,
+       .core.value[OPP_NOM] = VDD_CORE,
        .core.addr = SMPS_REG_ADDR_8_CORE,
        .core.pmic = &palmas,
 
-       .mm.value = VDD_MM,
+       .mm.value[OPP_NOM] = VDD_MM,
        .mm.addr = SMPS_REG_ADDR_45_IVA,
        .mm.pmic = &palmas,
 };
 
 struct vcores_data omap5430_volts_es2 = {
-       .mpu.value = VDD_MPU_ES2,
+       .mpu.value[OPP_NOM] = VDD_MPU_ES2,
        .mpu.addr = SMPS_REG_ADDR_12_MPU,
        .mpu.pmic = &palmas,
        .mpu.abb_tx_done_mask = OMAP_ABB_MPU_TXDONE_MASK,
 
-       .core.value = VDD_CORE_ES2,
+       .core.value[OPP_NOM] = VDD_CORE_ES2,
        .core.addr = SMPS_REG_ADDR_8_CORE,
        .core.pmic = &palmas,
 
-       .mm.value = VDD_MM_ES2,
+       .mm.value[OPP_NOM] = VDD_MM_ES2,
        .mm.addr = SMPS_REG_ADDR_45_IVA,
        .mm.pmic = &palmas,
        .mm.abb_tx_done_mask = OMAP_ABB_MM_TXDONE_MASK,
@@ -456,7 +472,7 @@ void enable_basic_clocks(void)
 void enable_basic_uboot_clocks(void)
 {
        u32 const clk_domains_essential[] = {
-#if defined(CONFIG_DRA7XX) || defined(CONFIG_AM57XX)
+#if defined(CONFIG_DRA7XX)
                (*prcm)->cm_ipu_clkstctrl,
 #endif
                0
@@ -472,7 +488,7 @@ void enable_basic_uboot_clocks(void)
                (*prcm)->cm_l4per_i2c2_clkctrl,
                (*prcm)->cm_l4per_i2c3_clkctrl,
                (*prcm)->cm_l4per_i2c4_clkctrl,
-#if defined(CONFIG_DRA7XX) || defined(CONFIG_AM57XX)
+#if defined(CONFIG_DRA7XX)
                (*prcm)->cm_ipu_i2c5_clkctrl,
 #else
                (*prcm)->cm_l4per_i2c5_clkctrl,