+// SPDX-License-Identifier: GPL-2.0+
/*
*
* Common board functions for OMAP3 based boards.
* Richard Woodruff <r-woodruff2@ti.com>
* Syed Mohammed Khasim <khasim@ti.com>
*
- *
- * SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
#include <dm.h>
#include <asm/omap_common.h>
#include <linux/compiler.h>
-DECLARE_GLOBAL_DATA_PTR;
-
/* Declarations */
extern omap3_sysinfo sysinfo;
#ifndef CONFIG_SYS_L2CACHE_OFF
{ 5, OMAP34XX_GPIO6_BASE },
};
-U_BOOT_DEVICES(am33xx_gpios) = {
+U_BOOT_DEVICES(omap34xx_gpios) = {
{ "gpio_omap", &omap34xx_gpio[0] },
{ "gpio_omap", &omap34xx_gpio[1] },
{ "gpio_omap", &omap34xx_gpio[2] },
return;
}
+void early_system_init(void)
+{
+ hw_data_init();
+}
+
/******************************************************************************
* Routine: s_init
* Description: Does early system init of muxing and clocks.
void s_init(void)
{
watchdog_init();
+ early_system_init();
try_unlock_memory();
#ifdef CONFIG_SPL_BUILD
void board_init_f(ulong dummy)
{
+ early_system_init();
mem_init();
+ /*
+ * Save the boot parameters passed from romcode.
+ * We cannot delay the saving further than this,
+ * to prevent overwrites.
+ */
+ save_omap_boot_params();
}
#endif
*****************************************************************************/
static int do_switch_ecc(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
{
+ int hw, strength = 1;
+
if (argc < 2 || argc > 3)
goto usage;
if (strncmp(argv[1], "hw", 2) == 0) {
- if (argc == 2) {
- omap_nand_switch_ecc(1, 1);
- } else {
- if (strncmp(argv[2], "hamming", 7) == 0)
- omap_nand_switch_ecc(1, 1);
- else if (strncmp(argv[2], "bch8", 4) == 0)
- omap_nand_switch_ecc(1, 8);
+ hw = 1;
+ if (argc == 3) {
+ if (strncmp(argv[2], "bch8", 4) == 0)
+ strength = 8;
else if (strncmp(argv[2], "bch16", 5) == 0)
- omap_nand_switch_ecc(1, 16);
- else
+ strength = 16;
+ else if (strncmp(argv[2], "hamming", 7) != 0)
goto usage;
}
} else if (strncmp(argv[1], "sw", 2) == 0) {
- if (argc == 2) {
- omap_nand_switch_ecc(0, 1);
- } else {
- if (strncmp(argv[2], "hamming", 7) == 0)
- omap_nand_switch_ecc(0, 1);
- else if (strncmp(argv[2], "bch8", 4) == 0)
- omap_nand_switch_ecc(0, 8);
- else
+ hw = 0;
+ if (argc == 3) {
+ if (strncmp(argv[2], "bch8", 4) == 0)
+ strength = 8;
+ else if (strncmp(argv[2], "hamming", 7) != 0)
goto usage;
}
} else {
goto usage;
}
- return 0;
+ return -omap_nand_switch_ecc(hw, strength);
usage:
printf ("Usage: nandecc %s\n", cmdtp->usage);
(u32 *)&emu_romcode_params);
}
+void v7_arch_cp15_set_l2aux_ctrl(u32 l2auxctrl, u32 cpu_midr,
+ u32 cpu_rev_comb, u32 cpu_variant,
+ u32 cpu_rev)
+{
+ if (get_device_type() == GP_DEVICE)
+ omap_smc1(OMAP3_GP_ROMCODE_API_WRITE_L2ACR, l2auxctrl);
+
+ /* L2 Cache Auxiliary Control Register is not banked */
+}
+
void v7_arch_cp15_set_acr(u32 acr, u32 cpu_midr, u32 cpu_rev_comb,
u32 cpu_variant, u32 cpu_rev)
{