am43xx: Do not allow EMIF to control DDR_RESET in rtconly config

[oweals/u-boot.git] / arch / arm / mach-omap2 / am33xx / sys_info.c

diff --git a/arch/arm/mach-omap2/am33xx/sys_info.c b/arch/arm/mach-omap2/am33xx/sys_info.c
index 564bae679362d0d7ba282fe68e39bc65fe1afe54..0181a8cb0cc5c7cf75be63fb59eab55799d5561e 100644 (file)
--- a/arch/arm/mach-omap2/am33xx/sys_info.c
+++ b/arch/arm/mach-omap2/am33xx/sys_info.c
@@ -50,16 +50,6 @@ u32 get_cpu_type(void)
        return partnum;
 }
 
-/**
- * get_device_type(): tell if GP/HS/EMU/TST
- */
-u32 get_device_type(void)
-{
-       int mode;
-       mode = readl(&cstat->statusreg) & (DEVICE_MASK);
-       return mode >>= 8;
-}
-
 /**
  * get_sysboot_value(void) - return SYS_BOOT[4:0]
  */
@@ -185,6 +175,22 @@ int am335x_get_efuse_mpu_max_freq(struct ctrl_dev *cdev)
        return MPUPLL_M_720;
 }
 
+int am335x_get_mpu_vdd(int sil_rev, int frequency)
+{
+       int sel_mask = am335x_get_tps65910_mpu_vdd(sil_rev, frequency);
+
+       switch (sel_mask) {
+       case TPS65910_OP_REG_SEL_1_3_2_5:
+               return 1325000;
+       case TPS65910_OP_REG_SEL_1_2_0:
+               return 1200000;
+       case TPS65910_OP_REG_SEL_1_1_0:
+               return 1100000;
+       default:
+               return 1262500;
+       }
+}
+
 int am335x_get_tps65910_mpu_vdd(int sil_rev, int frequency)
 {
        /* For PG2.0 and later, we have one set of values. */