writel(DDR_CKE_CTRL_NORMAL, &ddrctrl->ddrckectrl);
if (emif_sdram_type(regs->sdram_config) == EMIF_SDRAM_TYPE_DDR3)
+#ifndef CONFIG_SPL_RTC_DDR_SUPPORT
/* Allow EMIF to control DDR_RESET */
writel(0x00000000, &ddrctrl->ddrioctrl);
+#else
+ /* Override EMIF DDR_RESET control */
+ writel(0x80000000, &ddrctrl->ddrioctrl);
+#endif /* CONFIG_SPL_RTC_DDR_SUPPORT */
#endif
/* Program EMIF instance */