Merge tag 'mips-fixes-for-2019.01' of git://git.denx.de/u-boot-mips
[oweals/u-boot.git] / arch / arm / mach-omap2 / am33xx / ddr.c
index 690487e7c38b5a5581eee9479b50c162ed396a17..be6f4d72ccd96589f029e9b7948eb70aa18c982f 100644 (file)
@@ -1,9 +1,8 @@
+// SPDX-License-Identifier: GPL-2.0+
 /*
  * DDR Configuration for AM33xx devices.
  *
  * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
- *
- * SPDX-License-Identifier:    GPL-2.0+
  */
 
 #include <asm/arch/cpu.h>
@@ -163,6 +162,14 @@ void config_sdram_emif4d5(const struct emif_regs *regs, int nr)
  */
 void config_sdram(const struct emif_regs *regs, int nr)
 {
+#ifdef CONFIG_TI816X
+       writel(regs->sdram_config, &emif_reg[nr]->emif_sdram_config);
+       writel(regs->emif_ddr_phy_ctlr_1, &emif_reg[nr]->emif_ddr_phy_ctrl_1);
+       writel(regs->emif_ddr_phy_ctlr_1, &emif_reg[nr]->emif_ddr_phy_ctrl_1_shdw);
+       writel(0x0000613B, &emif_reg[nr]->emif_sdram_ref_ctrl);   /* initially a large refresh period */
+       writel(0x1000613B, &emif_reg[nr]->emif_sdram_ref_ctrl);   /* trigger initialization           */
+       writel(regs->ref_ctrl, &emif_reg[nr]->emif_sdram_ref_ctrl);
+#else
        if (regs->zq_config) {
                writel(regs->zq_config, &emif_reg[nr]->emif_zq_config);
                writel(regs->sdram_config, &cstat->secure_emif_sdram_config);
@@ -184,6 +191,7 @@ void config_sdram(const struct emif_regs *regs, int nr)
        /* Write REG_COS_COUNT_1, REG_COS_COUNT_2, and REG_PR_OLD_COUNT. */
        if (regs->ocp_config)
                writel(regs->ocp_config, &emif_reg[nr]->emif_l3_config);
+#endif
 }
 
 /**