Merge tag 'mips-fixes-for-2019.01' of git://git.denx.de/u-boot-mips

[oweals/u-boot.git] / arch / arm / mach-omap2 / am33xx / board.c

diff --git a/arch/arm/mach-omap2/am33xx/board.c b/arch/arm/mach-omap2/am33xx/board.c
index ef1de1a115b7507a8fb882846f0735c1ee903bd8..2fc364d112afebdf497efe16f532de3fd10ded52 100644 (file)
--- a/arch/arm/mach-omap2/am33xx/board.c
+++ b/arch/arm/mach-omap2/am33xx/board.c
@@ -1,11 +1,10 @@
+// SPDX-License-Identifier: GPL-2.0+
 /*
  * board.c
  *
  * Common board functions for AM33XX based boards
  *
  * Copyright (C) 2011, Texas Instruments, Incorporated - http://www.ti.com/
- *
- * SPDX-License-Identifier:    GPL-2.0+
  */
 
 #include <common.h>
@@ -20,6 +19,7 @@
 #include <asm/arch/ddr_defs.h>
 #include <asm/arch/clock.h>
 #include <asm/arch/gpio.h>
+#include <asm/arch/i2c.h>
 #include <asm/arch/mem.h>
 #include <asm/arch/mmc_host_def.h>
 #include <asm/arch/sys_proto.h>
@@ -94,6 +94,20 @@ U_BOOT_DEVICES(am33xx_uarts) = {
 #  endif
 };
 
+#ifdef CONFIG_DM_I2C
+static const struct omap_i2c_platdata am33xx_i2c[] = {
+       { I2C_BASE1, 100000, OMAP_I2C_REV_V2},
+       { I2C_BASE2, 100000, OMAP_I2C_REV_V2},
+       { I2C_BASE3, 100000, OMAP_I2C_REV_V2},
+};
+
+U_BOOT_DEVICES(am33xx_i2c) = {
+       { "i2c_omap", &am33xx_i2c[0] },
+       { "i2c_omap", &am33xx_i2c[1] },
+       { "i2c_omap", &am33xx_i2c[2] },
+};
+#endif
+
 #ifdef CONFIG_DM_GPIO
 static const struct omap_gpio_platdata am33xx_gpio[] = {
        { 0, AM33XX_GPIO0_BASE },
@@ -376,6 +390,9 @@ static void watchdog_disable(void)
 static void rtc_only(void)
 {
        struct davinci_rtc *rtc = (struct davinci_rtc *)RTC_BASE;
+       struct prm_device_inst *prm_device =
+                               (struct prm_device_inst *)PRM_DEVICE_INST;
+
        u32 scratch1;
        void (*resume_func)(void);
 
@@ -403,9 +420,20 @@ static void rtc_only(void)
         */
        rtc_only_update_board_type(scratch1 >> RTC_BOARD_TYPE_SHIFT);
 
+       /*
+        * Enable EMIF_DEVOFF in PRCM_PRM_EMIF_CTRL to indicate to EMIF we
+        * are resuming from self-refresh. This avoids an unnecessary re-init
+        * of the DDR. The re-init takes time and we would need to wait for
+        * it to complete before accessing DDR to avoid L3 NOC errors.
+        */
+       writel(EMIF_CTRL_DEVOFF, &prm_device->emif_ctrl);
+
        rtc_only_prcm_init();
        sdram_init();
 
+       /* Disable EMIF_DEVOFF for normal operation and to exit self-refresh */
+       writel(0, &prm_device->emif_ctrl);
+
        resume_func = (void *)readl(&rtc->scratch0);
        if (resume_func)
                resume_func();
@@ -444,12 +472,15 @@ void early_system_init(void)
 #ifdef CONFIG_DEBUG_UART_OMAP
        debug_uart_init();
 #endif
-#ifdef CONFIG_TI_I2C_BOARD_DETECT
-       do_board_detect();
-#endif
+
 #ifdef CONFIG_SPL_BUILD
        spl_early_init();
 #endif
+
+#ifdef CONFIG_TI_I2C_BOARD_DETECT
+       do_board_detect();
+#endif
+
 #if defined(CONFIG_SPL_AM33XX_ENABLE_RTC32K_OSC)
        /* Enable RTC32K clock */
        rtc32k_enable();