armv8: fsl-layerscape: make icid setup endianness aware

[oweals/u-boot.git] / arch / arm / mach-mvebu / timer.c

diff --git a/arch/arm/mach-mvebu/timer.c b/arch/arm/mach-mvebu/timer.c
index aef2df2f7a07390169c4b56f78081ded9f9ac4ea..2f6b4d1702f1a3a311f9bfe348195c452f6126da 100644 (file)
--- a/arch/arm/mach-mvebu/timer.c
+++ b/arch/arm/mach-mvebu/timer.c
@@ -1,18 +1,15 @@
+// SPDX-License-Identifier: GPL-2.0+
 /*
  * Copyright (C) Marvell International Ltd. and its affiliates
  * Written-by: Prafulla Wadaskar <prafulla@marvell.com>
  *
  * Copyright (C) 2015 Stefan Roese <sr@denx.de>
- *
- * SPDX-License-Identifier:    GPL-2.0+
  */
 
 #include <common.h>
 #include <asm/io.h>
 #include <asm/arch/soc.h>
 
-DECLARE_GLOBAL_DATA_PTR;
-
 #define TIMER_LOAD_VAL                 0xffffffff
 
 static int init_done __attribute__((section(".data"))) = 0;
@@ -31,7 +28,7 @@ int timer_init(void)
        writel(TIMER_LOAD_VAL, MVEBU_TIMER_BASE + 0x10);
        writel(TIMER_LOAD_VAL, MVEBU_TIMER_BASE + 0x14);
 
-#if defined(CONFIG_ARMADA_XP)
+#if defined(CONFIG_ARCH_MVEBU)
        /* On Armada XP / 38x ..., the 25MHz clock source needs to be enabled */
        setbits_le32(MVEBU_TIMER_BASE + 0x00, BIT(11));
 #endif