+// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (C) 2018 Armadeus Systems
- *
- * SPDX-License-Identifier: GPL-2.0+
*/
#include <asm/arch/clock.h>
#include <asm/mach-imx/iomux-v3.h>
#include <asm/io.h>
#include <common.h>
+#include <env.h>
#include <environment.h>
DECLARE_GLOBAL_DATA_PTR;
/* In bootstrap don't use the env vars */
if (((reg & 0x3000000) >> 24) == 0x1) {
- set_default_env(NULL);
+ set_default_env(NULL, 0);
env_set("preboot", "");
}
.sde_to_rst = 0x10, /* 14 cycles, 200us (JEDEC default) */
.rst_to_cke = 0x23, /* 33 cycles, 500us (JEDEC default) */
.ddr_type = DDR_TYPE_DDR3,
+ .refsel = 1, /* Refresh cycles at 32KHz */
+ .refr = 7, /* 8 refreshes commands per refresh cycle */
};
static struct mx6_ddr3_cfg mem_ddr = {
.trasmin = 3750,
};
+void board_boot_order(u32 *spl_boot_list)
+{
+ unsigned int bmode = readl(&src_base->sbmr2);
+
+ if (((bmode >> 24) & 0x03) == 0x01) /* Serial Downloader */
+ spl_boot_list[0] = BOOT_DEVICE_UART;
+ else
+ spl_boot_list[0] = spl_boot_device();
+}
+
static void ccgr_init(void)
{
struct mxc_ccm_reg *ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR;