Merge tag 'u-boot-atmel-fixes-2020.07-a' of https://gitlab.denx.de/u-boot/custodians...

[oweals/u-boot.git] / arch / arm / mach-imx / cpu.c

diff --git a/arch/arm/mach-imx/cpu.c b/arch/arm/mach-imx/cpu.c
index 51c7c05f04dac385c1a678e0e3e04e9f7107d4ab..f2070c97143261541ea8e3382467b48e66d8c949 100644 (file)
--- a/arch/arm/mach-imx/cpu.c
+++ b/arch/arm/mach-imx/cpu.c
@@ -8,6 +8,9 @@
 
 #include <bootm.h>
 #include <common.h>
+#include <init.h>
+#include <log.h>
+#include <net.h>
 #include <netdev.h>
 #include <linux/errno.h>
 #include <asm/io.h>
@@ -92,8 +95,20 @@ static char *get_reset_cause(void)
 const char *get_imx_type(u32 imxtype)
 {
        switch (imxtype) {
+       case MXC_CPU_IMX8MP:
+               return "8MP";   /* Quad-core version of the imx8mp */
        case MXC_CPU_IMX8MN:
-               return "8MNano";/* Quad-core version of the imx8mn */
+               return "8MNano Quad"; /* Quad-core version */
+       case MXC_CPU_IMX8MND:
+               return "8MNano Dual"; /* Dual-core version */
+       case MXC_CPU_IMX8MNS:
+               return "8MNano Solo"; /* Single-core version */
+       case MXC_CPU_IMX8MNL:
+               return "8MNano QuadLite"; /* Quad-core Lite version */
+       case MXC_CPU_IMX8MNDL:
+               return "8MNano DualLite"; /* Dual-core Lite version */
+       case MXC_CPU_IMX8MNSL:
+               return "8MNano SoloLite"; /* Single-core Lite version */
        case MXC_CPU_IMX8MM:
                return "8MMQ";  /* Quad-core version of the imx8mm */
        case MXC_CPU_IMX8MML:
@@ -107,7 +122,11 @@ const char *get_imx_type(u32 imxtype)
        case MXC_CPU_IMX8MMSL:
                return "8MMSL"; /* Single-core Lite version of the imx8mm */
        case MXC_CPU_IMX8MQ:
-               return "8MQ";   /* Quad-core version of the imx8m */
+               return "8MQ";   /* Quad-core version of the imx8mq */
+       case MXC_CPU_IMX8MQL:
+               return "8MQLite";       /* Quad-core Lite version of the imx8mq */
+       case MXC_CPU_IMX8MD:
+               return "8MD";   /* Dual-core version of the imx8mq */
        case MXC_CPU_MX7S:
                return "7S";    /* Single-core version of the mx7 */
        case MXC_CPU_MX7D:
@@ -152,12 +171,12 @@ int print_cpuinfo(void)
 
        cpurev = get_cpu_rev();
 
-#if defined(CONFIG_IMX_THERMAL)
+#if defined(CONFIG_IMX_THERMAL) || defined(CONFIG_IMX_TMU)
        struct udevice *thermal_dev;
        int cpu_tmp, minc, maxc, ret;
 
        printf("CPU:   Freescale i.MX%s rev%d.%d",
-              get_imx_type((cpurev & 0xFF000) >> 12),
+              get_imx_type((cpurev & 0x1FF000) >> 12),
               (cpurev & 0x000F0) >> 4,
               (cpurev & 0x0000F) >> 0);
        max_freq = get_cpu_speed_grade_hz();
@@ -169,13 +188,13 @@ int print_cpuinfo(void)
        }
 #else
        printf("CPU:   Freescale i.MX%s rev%d.%d at %d MHz\n",
-               get_imx_type((cpurev & 0xFF000) >> 12),
+               get_imx_type((cpurev & 0x1FF000) >> 12),
                (cpurev & 0x000F0) >> 4,
                (cpurev & 0x0000F) >> 0,
                mxc_get_clock(MXC_ARM_CLK) / 1000000);
 #endif
 
-#if defined(CONFIG_IMX_THERMAL)
+#if defined(CONFIG_IMX_THERMAL) || defined(CONFIG_IMX_TMU)
        puts("CPU:   ");
        switch (get_cpu_temp_grade(&minc, &maxc)) {
        case TEMP_AUTOMOTIVE:
@@ -312,6 +331,7 @@ enum cpu_speed {
        OCOTP_TESTER3_SPEED_GRADE1,
        OCOTP_TESTER3_SPEED_GRADE2,
        OCOTP_TESTER3_SPEED_GRADE3,
+       OCOTP_TESTER3_SPEED_GRADE4,
 };
 
 u32 get_cpu_speed_grade_hz(void)
@@ -324,17 +344,28 @@ u32 get_cpu_speed_grade_hz(void)
 
        val = readl(&fuse->tester3);
        val >>= OCOTP_TESTER3_SPEED_SHIFT;
-       val &= 0x3;
+
+       if (is_imx8mn() || is_imx8mp()) {
+               val &= 0xf;
+               return 2300000000 - val * 100000000;
+       }
+
+       if (is_imx8mm())
+               val &= 0x7;
+       else
+               val &= 0x3;
 
        switch(val) {
        case OCOTP_TESTER3_SPEED_GRADE0:
                return 800000000;
        case OCOTP_TESTER3_SPEED_GRADE1:
-               return is_mx7() ? 500000000 : 1000000000;
+               return (is_mx7() ? 500000000 : (is_imx8mq() ? 1000000000 : 1200000000));
        case OCOTP_TESTER3_SPEED_GRADE2:
-               return is_mx7() ? 1000000000 : 1300000000;
+               return (is_mx7() ? 1000000000 : (is_imx8mq() ? 1300000000 : 1600000000));
        case OCOTP_TESTER3_SPEED_GRADE3:
-               return is_mx7() ? 1200000000 : 1500000000;
+               return (is_mx7() ? 1200000000 : (is_imx8mq() ? 1500000000 : 1800000000));
+       case OCOTP_TESTER3_SPEED_GRADE4:
+               return 2000000000;
        }
 
        return 0;