Merge tag 'uniphier-v2019.07' of git://git.denx.de/u-boot-uniphier

[oweals/u-boot.git] / arch / arm / mach-imx / cpu.c

diff --git a/arch/arm/mach-imx/cpu.c b/arch/arm/mach-imx/cpu.c
index 4d4d434906f1b1dddb5b0caee11e0e2ad7c97ff0..6b83f926623366cda86b14a2ec1c855046ba491a 100644 (file)
--- a/arch/arm/mach-imx/cpu.c
+++ b/arch/arm/mach-imx/cpu.c
@@ -1,10 +1,9 @@
+// SPDX-License-Identifier: GPL-2.0+
 /*
  * (C) Copyright 2007
  * Sascha Hauer, Pengutronix
  *
  * (C) Copyright 2009 Freescale Semiconductor, Inc.
- *
- * SPDX-License-Identifier:    GPL-2.0+
  */
 
 #include <bootm.h>
@@ -26,19 +25,27 @@
 #include <fsl_esdhc.h>
 #endif
 
-#if defined(CONFIG_DISPLAY_CPUINFO) && !defined(CONFIG_SPL_BUILD)
 static u32 reset_cause = -1;
 
-static char *get_reset_cause(void)
+u32 get_imx_reset_cause(void)
 {
-       u32 cause;
        struct src *src_regs = (struct src *)SRC_BASE_ADDR;
 
-       cause = readl(&src_regs->srsr);
-       writel(cause, &src_regs->srsr);
-       reset_cause = cause;
+       if (reset_cause == -1) {
+               reset_cause = readl(&src_regs->srsr);
+/* preserve the value for U-Boot proper */
+#if !defined(CONFIG_SPL_BUILD)
+               writel(reset_cause, &src_regs->srsr);
+#endif
+       }
+
+       return reset_cause;
+}
 
-       switch (cause) {
+#if defined(CONFIG_DISPLAY_CPUINFO) && !defined(CONFIG_SPL_BUILD)
+static char *get_reset_cause(void)
+{
+       switch (get_imx_reset_cause()) {
        case 0x00001:
        case 0x00011:
                return "POR";
@@ -63,7 +70,7 @@ static char *get_reset_cause(void)
                return "WDOG4";
        case 0x00200:
                return "TEMPSENSE";
-#elif defined(CONFIG_MX8M)
+#elif defined(CONFIG_IMX8M)
        case 0x00100:
                return "WDOG2";
        case 0x00200:
@@ -78,11 +85,6 @@ static char *get_reset_cause(void)
                return "unknown reset";
        }
 }
-
-u32 get_imx_reset_cause(void)
-{
-       return reset_cause;
-}
 #endif
 
 #if defined(CONFIG_MX53) || defined(CONFIG_MX6)
@@ -143,8 +145,8 @@ unsigned imx_ddr_size(void)
 const char *get_imx_type(u32 imxtype)
 {
        switch (imxtype) {
-       case MXC_CPU_MX8MQ:
-               return "8MQ";   /* Quad-core version of the mx8m */
+       case MXC_CPU_IMX8MQ:
+               return "8MQ";   /* Quad-core version of the imx8m */
        case MXC_CPU_MX7S:
                return "7S";    /* Single-core version of the mx7 */
        case MXC_CPU_MX7D:
@@ -267,7 +269,7 @@ int cpu_mmc_init(bd_t *bis)
 }
 #endif
 
-#if !(defined(CONFIG_MX7) || defined(CONFIG_MX8M))
+#if !(defined(CONFIG_MX7) || defined(CONFIG_IMX8M))
 u32 get_ahb_clk(void)
 {
        struct mxc_ccm_reg *imx_ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR;
@@ -301,7 +303,7 @@ void arch_preboot_os(void)
 #endif
 }
 
-#ifndef CONFIG_MX8M
+#ifndef CONFIG_IMX8M
 void set_chipselect_size(int const cs_size)
 {
        unsigned int reg;
@@ -334,7 +336,7 @@ void set_chipselect_size(int const cs_size)
 }
 #endif
 
-#if defined(CONFIG_MX7) || defined(CONFIG_MX8M)
+#if defined(CONFIG_MX7) || defined(CONFIG_IMX8M)
 /*
  * OCOTP_TESTER3[9:8] (see Fusemap Description Table offset 0x440)
  * defines a 2-bit SPEED_GRADING
@@ -410,7 +412,7 @@ u32 get_cpu_temp_grade(int *minc, int *maxc)
 }
 #endif
 
-#if defined(CONFIG_MX7) || defined(CONFIG_MX8M)
+#if defined(CONFIG_MX7) || defined(CONFIG_IMX8M)
 enum boot_device get_boot_device(void)
 {
        struct bootrom_sw_info **p =
@@ -439,7 +441,7 @@ enum boot_device get_boot_device(void)
        case BOOT_TYPE_SPINOR:
                boot_dev = SPI_NOR_BOOT;
                break;
-#ifdef CONFIG_MX8M
+#ifdef CONFIG_IMX8M
        case BOOT_TYPE_USB:
                boot_dev = USB_BOOT;
                break;