zynq: Kconfig: extend the bootstrap malloc() pool

[oweals/u-boot.git] / arch / arm / mach-davinci / Kconfig

diff --git a/arch/arm/mach-davinci/Kconfig b/arch/arm/mach-davinci/Kconfig
index 7b05b1749ae2d5fbecbd1fe3c9e7819db22a22f0..12b1e682e6a221b69cffb052043dcd703b61dcd4 100644 (file)
--- a/arch/arm/mach-davinci/Kconfig
+++ b/arch/arm/mach-davinci/Kconfig
@@ -18,13 +18,13 @@ config TARGET_DA850EVM
 
 config TARGET_EA20
        bool "EA20 board"
+       select BOARD_LATE_INIT
        select MACH_DAVINCI_DA850_EVM
        select SOC_DA850
-       select BOARD_LATE_INIT
 
 config TARGET_OMAPL138_LCDK
        bool "OMAPL138 LCDK"
-       select SOC_DA850
+       select SOC_DA8XX
        select SUPPORT_SPL
 
 config TARGET_CALIMAIN
@@ -54,10 +54,10 @@ config SYS_DA850_DDR_INIT
 config SOC_DA850
        bool
        select SOC_DA8XX
-       select SYS_DA850_DDR_INIT if SUPPORT_SPL || DA850_LOWLEVEL
 
 config SOC_DA8XX
        bool
+       select SYS_DA850_DDR_INIT if SUPPORT_SPL || DA850_LOWLEVEL
        select SYS_DA850_PLL_INIT if SUPPORT_SPL || DA850_LOWLEVEL
 
 config MACH_DAVINCI_DA850_EVM
@@ -68,79 +68,79 @@ comment "DA850 PLL Initialization Parameters"
 
 config SYS_DV_CLKMODE
        int "PLLCTL Clock Mode"
-       default 0 if SOC_DA850
+       default 0
        help
          Set PLLCTL Clock Mode bit as External Clock or On Chip oscillator
 
 config SYS_DA850_PLL0_POSTDIV
        int "PLLC0 PLL Post-Divider"
-       default 1 if SOC_DA850
+       default 1
        help
          Value written to PLLC0 PLL Post-Divider Control Register
 
 config SYS_DA850_PLL0_PLLDIV1
        hex "PLLC0 Divider 1"
-       default 0x8000 if SOC_DA850
+       default 0x8000
        help
          Value written to PLLC0 Divider 1 register
 
 config SYS_DA850_PLL0_PLLDIV2
        hex "PLLC0 Divider 2"
-       default 0x8001 if SOC_DA850
+       default 0x8001
        help
          Value written to PLLC0 Divider 2 register
 
 config SYS_DA850_PLL0_PLLDIV3
        hex "PLLC0 Divider 3"
-       default 0x8002 if SOC_DA850
+       default 0x8002
        help
          Value written to PLLC0 Divider 3 register
 
 config SYS_DA850_PLL0_PLLDIV4
        hex "PLLC0 Divider 4"
-       default 0x8003 if SOC_DA850
+       default 0x8003
        help
          Value written to PLLC0 Divider 4 register
 
 config SYS_DA850_PLL0_PLLDIV5
        hex "PLLC0 Divider 5"
-       default 0x8002 if SOC_DA850
+       default 0x8002
        help
          Value written to PLLC0 Divider 5 register
 
 config SYS_DA850_PLL0_PLLDIV6
        hex "PLLC0 Divider 6"
-       default 0x8000 if SOC_DA850
+       default 0x8000
        help
          Value written to PLLC0 Divider 6 register
 
 config SYS_DA850_PLL0_PLLDIV7
        hex "PLLC0 Divider 7"
-       default 0x8005 if SOC_DA850
+       default 0x8005
        help
          Value written to PLLC0 Divider 7 register
 
 config SYS_DA850_PLL1_POSTDIV
        hex "PLLC1 PLL Post-Divider"
-       default 1 if SOC_DA850
+       default 1
        help
          Value written to PLLC1 PLL Post-Divider Control Register
 
 config SYS_DA850_PLL1_PLLDIV1
        hex "PLLC1 Divider 2"
-       default 0x8000 if SOC_DA850
+       default 0x8000
        help
          Value written to PLLC1 Divider 1 register
 
 config SYS_DA850_PLL1_PLLDIV2
        hex "PLLC1 Divider 2"
-       default 0x8001 if SOC_DA850
+       default 0x8001
        help
          Value written to PLLC1 Divider 2 register
 
 config SYS_DA850_PLL1_PLLDIV3
        hex "PLLC1 Divider 3"
-       default 0x8002 if SOC_DA850
+       default 0x8002
        help
          Value written to PLLC1 Divider 3 register