rockchip: rk3288: Move clock CMD to SoC file

[oweals/u-boot.git] / arch / arm / mach-bcm283x / reset.c

diff --git a/arch/arm/mach-bcm283x/reset.c b/arch/arm/mach-bcm283x/reset.c
index aa02d3f9f6a6ac78947ce9ddecdfd1254dd360fd..7712d4664ca2b3d6e8ce4e2da3f27e42a7e44dcc 100644 (file)
--- a/arch/arm/mach-bcm283x/reset.c
+++ b/arch/arm/mach-bcm283x/reset.c
@@ -1,10 +1,9 @@
+// SPDX-License-Identifier: GPL-2.0
 /*
  * (C) Copyright 2012 Stephen Warren
  *
  * See file CREDITS for list of people who contributed to this
  * project.
- *
- * SPDX-License-Identifier:    GPL-2.0
  */
 
 #include <common.h>
@@ -60,13 +59,11 @@ void __efi_runtime EFIAPI efi_reset_system(
 {
        u32 val;
 
-       switch (reset_type) {
-       case EFI_RESET_COLD:
-       case EFI_RESET_WARM:
-       case EFI_RESET_PLATFORM_SPECIFIC:
+       if (reset_type == EFI_RESET_COLD ||
+           reset_type == EFI_RESET_WARM ||
+           reset_type == EFI_RESET_PLATFORM_SPECIFIC) {
                reset_cpu(0);
-               break;
-       case EFI_RESET_SHUTDOWN:
+       } else if (reset_type == EFI_RESET_SHUTDOWN) {
                /*
                 * We set the watchdog hard reset bit here to distinguish this reset
                 * from the normal (full) reset. bootcode.bin will not reboot after a
@@ -77,7 +74,6 @@ void __efi_runtime EFIAPI efi_reset_system(
                val |= BCM2835_WDOG_RSTS_RASPBERRYPI_HALT;
                writel(val, &wdog_regs->rsts);
                reset_cpu(0);
-               break;
        }
 
        while (1) { }