#define ATMEL_BASE_RTC 0xfffffeb0
/* Reserved: 0xfffffee0 - 0xffffffff */
+#define ATMEL_CHIPID_CIDR 0xffffee40
+#define ATMEL_CHIPID_EXID 0xffffee44
+
/*
* Internal Memory.
*/
#define PIO_SCDR_DIV 0x3fff
#define CPU_HAS_PCR
+/* Timer */
+#define CONFIG_SYS_TIMER_COUNTER 0xfffffe3c
+
/*
* PMECC table in ROM
*/