clk: at91: utmi: Set the reference clock frequency

[oweals/u-boot.git] / arch / arm / mach-at91 / include / mach / at91_pmc.h

diff --git a/arch/arm/mach-at91/include/mach/at91_pmc.h b/arch/arm/mach-at91/include/mach/at91_pmc.h
index 7684f09afcbb8fa649031077c702204855e5c61f..2875ff20b192954cf27c06523db6a44bbdfa5d6b 100644 (file)
--- a/arch/arm/mach-at91/include/mach/at91_pmc.h
+++ b/arch/arm/mach-at91/include/mach/at91_pmc.h
@@ -67,18 +67,18 @@ typedef struct at91_pmc {
 #define AT91_PMC_MOR_MOSCEN            0x01
 #define AT91_PMC_MOR_OSCBYPASS         0x02
 #define AT91_PMC_MOR_MOSCRCEN          0x08
-#define AT91_PMC_MOR_OSCOUNT(x)                ((x & 0xff) << 8)
-#define AT91_PMC_MOR_KEY(x)            ((x & 0xff) << 16)
+#define AT91_PMC_MOR_OSCOUNT(x)                (((x) & 0xff) << 8)
+#define AT91_PMC_MOR_KEY(x)            (((x) & 0xff) << 16)
 #define AT91_PMC_MOR_MOSCSEL           (1 << 24)
 
-#define AT91_PMC_PLLXR_DIV(x)          (x & 0xFF)
-#define AT91_PMC_PLLXR_PLLCOUNT(x)     ((x & 0x3F) << 8)
-#define AT91_PMC_PLLXR_OUT(x)          ((x & 0x03) << 14)
+#define AT91_PMC_PLLXR_DIV(x)          ((x) & 0xFF)
+#define AT91_PMC_PLLXR_PLLCOUNT(x)     (((x) & 0x3F) << 8)
+#define AT91_PMC_PLLXR_OUT(x)          (((x) & 0x03) << 14)
 #if defined(CONFIG_SAMA5D2) || defined(CONFIG_SAMA5D3) || \
        defined(CONFIG_SAMA5D4)
-#define AT91_PMC_PLLXR_MUL(x)          ((x & 0x7F) << 18)
+#define AT91_PMC_PLLXR_MUL(x)          (((x) & 0x7F) << 18)
 #else
-#define AT91_PMC_PLLXR_MUL(x)          ((x & 0x7FF) << 16)
+#define AT91_PMC_PLLXR_MUL(x)          (((x) & 0x7FF) << 16)
 #endif
 #define AT91_PMC_PLLAR_29              0x20000000
 #define AT91_PMC_PLLBR_USBDIV_1                0x00000000
@@ -149,6 +149,9 @@ typedef struct at91_pmc {
 
 #define AT91_PMC_PCR_PID_MASK          (0x3f)
 #define AT91_PMC_PCR_GCKCSS            (0x7 << 8)
+#define AT91_PMC_PCR_GCKCSS_MASK       0x07
+#define AT91_PMC_PCR_GCKCSS_OFFSET     8
+#define AT91_PMC_PCR_GCKCSS_(x)                ((x & 0x07) << 8)
 #define                AT91_PMC_PCR_GCKCSS_SLOW_CLK    (0x0 << 8)
 #define                AT91_PMC_PCR_GCKCSS_MAIN_CLK    (0x1 << 8)
 #define                AT91_PMC_PCR_GCKCSS_PLLA_CLK    (0x2 << 8)
@@ -158,8 +161,9 @@ typedef struct at91_pmc {
 #define AT91_PMC_PCR_CMD_WRITE         (0x1 << 12)
 #define AT91_PMC_PCR_DIV               (0x3 << 16)
 #define AT91_PMC_PCR_GCKDIV            (0xff << 20)
-#define                AT91_PMC_PCR_GCKDIV_(x)         ((x & 0xff) << 20)
-#define                AT91_PMC_PCR_GCKDIV_OFFSET      20
+#define AT91_PMC_PCR_GCKDIV_MASK       0xff
+#define AT91_PMC_PCR_GCKDIV_OFFSET     20
+#define AT91_PMC_PCR_GCKDIV_(x)                ((x & 0xff) << 20)
 #define AT91_PMC_PCR_EN                        (0x1 << 28)
 #define AT91_PMC_PCR_GCKEN             (0x1 << 29)
 
@@ -243,8 +247,9 @@ typedef struct at91_pmc {
 #define                AT91_PMC_PCK1RDY        (1 <<  9)               /* Programmable Clock 1 */
 #define                AT91_PMC_PCK2RDY        (1 << 10)               /* Programmable Clock 2 */
 #define                AT91_PMC_PCK3RDY        (1 << 11)               /* Programmable Clock 3 */
+#define                AT91_PMC_MOSCSELS       BIT(16)                 /* Main Oscillator Selection Status */
+#define                AT91_PMC_MOSCRCS        BIT(17)                 /* 12 MHz RC Oscillator Status */
 #define                AT91_PMC_GCKRDY         (1 << 24)
-
 #define                AT91_PMC_PROTKEY        0x504d4301      /* Activation Code */
 
 /* PLL Charge Pump Current Register (PMC_PLLICPR) */