ARM: dts: stm32: Repair SDMMC1 operation on AV96

[oweals/u-boot.git] / arch / arm / lib / crt0.S

diff --git a/arch/arm/lib/crt0.S b/arch/arm/lib/crt0.S
index 8415f77e1b1e02b5159b3059dd19c572ccb16098..fb6c37cf519494aa55a562354e066dcf434ddce6 100644 (file)
--- a/arch/arm/lib/crt0.S
+++ b/arch/arm/lib/crt0.S
@@ -1,17 +1,14 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
 /*
  *  crt0 - C-runtime startup Code for ARM U-Boot
  *
  *  Copyright (c) 2012  Albert ARIBAUD <albert.u.boot@aribaud.net>
- *
- * SPDX-License-Identifier:    GPL-2.0+
  */
 
 #include <config.h>
 #include <asm-offsets.h>
 #include <linux/linkage.h>
-#ifdef CONFIG_CPU_V7M
-#include <asm/armv7m.h>
-#endif
+#include <asm/assembler.h>
 
 /*
  * This file handles the target-independent stages of the U-Boot
@@ -60,6 +57,33 @@
  * For more information see 'Board Initialisation Flow in README.
  */
 
+/*
+ * Macro for clearing BSS during SPL execution. Usually called during the
+ * relocation process for most boards before entering board_init_r(), but
+ * can also be done early before entering board_init_f() on plaforms that
+ * can afford it due to sufficient memory being available early.
+ */
+
+.macro SPL_CLEAR_BSS
+       ldr     r0, =__bss_start        /* this is auto-relocated! */
+
+#ifdef CONFIG_USE_ARCH_MEMSET
+       ldr     r3, =__bss_end          /* this is auto-relocated! */
+       mov     r1, #0x00000000         /* prepare zero to clear BSS */
+
+       subs    r2, r3, r0              /* r2 = memset len */
+       bl      memset
+#else
+       ldr     r1, =__bss_end          /* this is auto-relocated! */
+       mov     r2, #0x00000000         /* prepare zero to clear BSS */
+
+clbss_l:cmp    r0, r1                  /* while not at end of BSS */
+       strlo   r2, [r0]                /* clear 32-bit BSS word */
+       addlo   r0, r0, #4              /* move to next */
+       blo     clbss_l
+#endif
+.endm
+
 /*
  * entry point of crt0 sequence
  */
@@ -70,25 +94,25 @@ ENTRY(_main)
  * Set up initial C runtime environment and call board_init_f(0).
  */
 
-#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_STACK)
-       ldr     sp, =(CONFIG_SPL_STACK)
-#else
-       ldr     sp, =(CONFIG_SYS_INIT_SP_ADDR)
-#endif
-#if defined(CONFIG_CPU_V7M)    /* v7M forbids using SP as BIC destination */
-       mov     r3, sp
-       bic     r3, r3, #7
-       mov     sp, r3
+#if defined(CONFIG_TPL_BUILD) && defined(CONFIG_TPL_NEEDS_SEPARATE_STACK)
+       ldr     r0, =(CONFIG_TPL_STACK)
+#elif defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_STACK)
+       ldr     r0, =(CONFIG_SPL_STACK)
 #else
-       bic     sp, sp, #7      /* 8-byte alignment for ABI compliance */
+       ldr     r0, =(CONFIG_SYS_INIT_SP_ADDR)
 #endif
-       mov     r0, sp
+       bic     r0, r0, #7      /* 8-byte alignment for ABI compliance */
+       mov     sp, r0
        bl      board_init_f_alloc_reserve
        mov     sp, r0
        /* set up gd here, outside any C code */
        mov     r9, r0
        bl      board_init_f_init_reserve
 
+#if defined(CONFIG_SPL_EARLY_BSS)
+       SPL_CLEAR_BSS
+#endif
+
        mov     r0, #0
        bl      board_init_f
 
@@ -100,14 +124,9 @@ ENTRY(_main)
  * 'here' but relocated.
  */
 
-       ldr     sp, [r9, #GD_START_ADDR_SP]     /* sp = gd->start_addr_sp */
-#if defined(CONFIG_CPU_V7M)    /* v7M forbids using SP as BIC destination */
-       mov     r3, sp
-       bic     r3, r3, #7
-       mov     sp, r3
-#else
-       bic     sp, sp, #7      /* 8-byte alignment for ABI compliance */
-#endif
+       ldr     r0, [r9, #GD_START_ADDR_SP]     /* sp = gd->start_addr_sp */
+       bic     r0, r0, #7      /* 8-byte alignment for ABI compliance */
+       mov     sp, r0
        ldr     r9, [r9, #GD_BD]                /* r9 = gd->bd */
        sub     r9, r9, #GD_SIZE                /* new GD is below bd */
 
@@ -130,7 +149,12 @@ here:
 
        bl      c_runtime_cpu_setup     /* we still call old routine here */
 #endif
-#if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_FRAMEWORK)
+#if !defined(CONFIG_SPL_BUILD) || CONFIG_IS_ENABLED(FRAMEWORK)
+
+#if !defined(CONFIG_SPL_EARLY_BSS)
+       SPL_CLEAR_BSS
+#endif
+
 # ifdef CONFIG_SPL_BUILD
        /* Use a DRAM stack for the rest of SPL, if requested */
        bl      spl_relocate_stack_gd
@@ -138,26 +162,6 @@ here:
        movne   sp, r0
        movne   r9, r0
 # endif
-       ldr     r0, =__bss_start        /* this is auto-relocated! */
-
-#ifdef CONFIG_USE_ARCH_MEMSET
-       ldr     r3, =__bss_end          /* this is auto-relocated! */
-       mov     r1, #0x00000000         /* prepare zero to clear BSS */
-
-       subs    r2, r3, r0              /* r2 = memset len */
-       bl      memset
-#else
-       ldr     r1, =__bss_end          /* this is auto-relocated! */
-       mov     r2, #0x00000000         /* prepare zero to clear BSS */
-
-clbss_l:cmp    r0, r1                  /* while not at end of BSS */
-#if defined(CONFIG_CPU_V7M)
-       itt     lo
-#endif
-       strlo   r2, [r0]                /* clear 32-bit BSS word */
-       addlo   r0, r0, #4              /* move to next */
-       blo     clbss_l
-#endif
 
 #if ! defined(CONFIG_SPL_BUILD)
        bl coloured_LED_init
@@ -167,7 +171,7 @@ clbss_l:cmp r0, r1                  /* while not at end of BSS */
        mov     r0, r9                  /* gd_t */
        ldr     r1, [r9, #GD_RELOCADDR] /* dest_addr */
        /* call board_init_r */
-#if defined(CONFIG_SYS_THUMB_BUILD)
+#if CONFIG_IS_ENABLED(SYS_THUMB_BUILD)
        ldr     lr, =board_init_r       /* this is auto-relocated! */
        bx      lr
 #else