Merge branch 'master' of git://www.denx.de/git/u-boot-imx

[oweals/u-boot.git] / arch / arm / include / asm / imx-common / regs-bch.h

diff --git a/arch/arm/include/asm/imx-common/regs-bch.h b/arch/arm/include/asm/imx-common/regs-bch.h
index 3a73de472cf7d1e78d6e0440e70cef39b017adeb..a33d3419b9f6461d87a428c30f818c5656685e0e 100644 (file)
--- a/arch/arm/include/asm/imx-common/regs-bch.h
+++ b/arch/arm/include/asm/imx-common/regs-bch.h
@@ -7,20 +7,7 @@
  * Based on code from LTIB:
  * Copyright 2008-2010 Freescale Semiconductor, Inc. All Rights Reserved.
  *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
- *
+ * SPDX-License-Identifier:    GPL-2.0+
  */
 
 #ifndef __MX28_REGS_BCH_H__
@@ -136,8 +123,13 @@ struct mxs_bch_regs {
 #define        BCH_FLASHLAYOUT0_NBLOCKS_OFFSET                 24
 #define        BCH_FLASHLAYOUT0_META_SIZE_MASK                 (0xff << 16)
 #define        BCH_FLASHLAYOUT0_META_SIZE_OFFSET               16
+#if defined(CONFIG_MX6)
+#define        BCH_FLASHLAYOUT0_ECC0_MASK                      (0x1f << 11)
+#define        BCH_FLASHLAYOUT0_ECC0_OFFSET                    11
+#else
 #define        BCH_FLASHLAYOUT0_ECC0_MASK                      (0xf << 12)
 #define        BCH_FLASHLAYOUT0_ECC0_OFFSET                    12
+#endif
 #define        BCH_FLASHLAYOUT0_ECC0_NONE                      (0x0 << 12)
 #define        BCH_FLASHLAYOUT0_ECC0_ECC2                      (0x1 << 12)
 #define        BCH_FLASHLAYOUT0_ECC0_ECC4                      (0x2 << 12)
@@ -161,8 +153,13 @@ struct mxs_bch_regs {
 
 #define        BCH_FLASHLAYOUT1_PAGE_SIZE_MASK                 (0xffff << 16)
 #define        BCH_FLASHLAYOUT1_PAGE_SIZE_OFFSET               16
+#if defined(CONFIG_MX6)
+#define        BCH_FLASHLAYOUT1_ECCN_MASK                      (0x1f << 11)
+#define        BCH_FLASHLAYOUT1_ECCN_OFFSET                    11
+#else
 #define        BCH_FLASHLAYOUT1_ECCN_MASK                      (0xf << 12)
 #define        BCH_FLASHLAYOUT1_ECCN_OFFSET                    12
+#endif
 #define        BCH_FLASHLAYOUT1_ECCN_NONE                      (0x0 << 12)
 #define        BCH_FLASHLAYOUT1_ECCN_ECC2                      (0x1 << 12)
 #define        BCH_FLASHLAYOUT1_ECCN_ECC4                      (0x2 << 12)