ARM: DRA7: Add support for IO delay configuration

[oweals/u-boot.git] / arch / arm / include / asm / armv8 / mmu.h

diff --git a/arch/arm/include/asm/armv8/mmu.h b/arch/arm/include/asm/armv8/mmu.h
index 1193e76a82a0f6473845095cca5dc6cc19d1ee0f..4b9cb5296572cc9db2d76ffd4193939237da669d 100644 (file)
--- a/arch/arm/include/asm/armv8/mmu.h
+++ b/arch/arm/include/asm/armv8/mmu.h
@@ -65,7 +65,8 @@
 /*
  * Section
  */
-#define PMD_SECT_S             (3 << 8)
+#define PMD_SECT_OUTER_SHARE   (2 << 8)
+#define PMD_SECT_INNER_SHARE   (3 << 8)
 #define PMD_SECT_AF            (1 << 10)
 #define PMD_SECT_NG            (1 << 11)
 #define PMD_SECT_PXN           (UL(1) << 53)
@@ -108,4 +109,28 @@
                                TCR_IRGN_WBWA |         \
                                TCR_T0SZ(VA_BITS))
 
+#ifndef __ASSEMBLY__
+void set_pgtable_section(u64 *page_table, u64 index,
+                        u64 section, u64 memory_type);
+static inline void set_ttbr_tcr_mair(int el, u64 table, u64 tcr, u64 attr)
+{
+       asm volatile("dsb sy");
+       if (el == 1) {
+               asm volatile("msr ttbr0_el1, %0" : : "r" (table) : "memory");
+               asm volatile("msr tcr_el1, %0" : : "r" (tcr) : "memory");
+               asm volatile("msr mair_el1, %0" : : "r" (attr) : "memory");
+       } else if (el == 2) {
+               asm volatile("msr ttbr0_el2, %0" : : "r" (table) : "memory");
+               asm volatile("msr tcr_el2, %0" : : "r" (tcr) : "memory");
+               asm volatile("msr mair_el2, %0" : : "r" (attr) : "memory");
+       } else if (el == 3) {
+               asm volatile("msr ttbr0_el3, %0" : : "r" (table) : "memory");
+               asm volatile("msr tcr_el3, %0" : : "r" (tcr) : "memory");
+               asm volatile("msr mair_el3, %0" : : "r" (attr) : "memory");
+       } else {
+               hang();
+       }
+       asm volatile("isb");
+}
+#endif
 #endif /* _ASM_ARMV8_MMU_H_ */