Merge branch 'master' of http://git.denx.de/u-boot-sparc

[oweals/u-boot.git] / arch / arm / include / asm / armv8 / mmu.h

diff --git a/arch/arm/include/asm/armv8/mmu.h b/arch/arm/include/asm/armv8/mmu.h
index 4b7b67b643de7ce9e6e0cb47e47dda354a1c2b69..2e2a3a8226d9a6c37fd3336f907e43a26e5d39aa 100644 (file)
--- a/arch/arm/include/asm/armv8/mmu.h
+++ b/arch/arm/include/asm/armv8/mmu.h
@@ -65,7 +65,10 @@
 /*
  * Section
  */
-#define PMD_SECT_S             (3 << 8)
+#define PMD_SECT_NS            (1 << 5)
+#define PMD_SECT_NON_SHARE     (0 << 8)
+#define PMD_SECT_OUTER_SHARE   (2 << 8)
+#define PMD_SECT_INNER_SHARE   (3 << 8)
 #define PMD_SECT_AF            (1 << 10)
 #define PMD_SECT_NG            (1 << 11)
 #define PMD_SECT_PXN           (UL(1) << 53)
@@ -92,8 +95,8 @@
 #define TCR_ORGN_WBNWA         (3 << 10)
 #define TCR_ORGN_MASK          (3 << 10)
 #define TCR_SHARED_NON         (0 << 12)
-#define TCR_SHARED_OUTER       (1 << 12)
-#define TCR_SHARED_INNER       (2 << 12)
+#define TCR_SHARED_OUTER       (2 << 12)
+#define TCR_SHARED_INNER       (3 << 12)
 #define TCR_TG0_4K             (0 << 14)
 #define TCR_TG0_64K            (1 << 14)
 #define TCR_TG0_16K            (2 << 14)
@@ -101,16 +104,25 @@
 #define TCR_EL2_IPS_BITS       (3 << 16)       /* 42 bits physical address */
 #define TCR_EL3_IPS_BITS       (3 << 16)       /* 42 bits physical address */
 
-/* PTWs cacheable, inner/outer WBWA and non-shareable */
+/* PTWs cacheable, inner/outer WBWA and inner shareable */
 #define TCR_FLAGS              (TCR_TG0_64K |          \
-                               TCR_SHARED_NON |        \
+                               TCR_SHARED_INNER |      \
                                TCR_ORGN_WBWA |         \
                                TCR_IRGN_WBWA |         \
                                TCR_T0SZ(VA_BITS))
 
+#define TCR_EL1_RSVD           (1 << 31)
+#define TCR_EL2_RSVD           (1 << 31 | 1 << 23)
+#define TCR_EL3_RSVD           (1 << 31 | 1 << 23)
+
 #ifndef __ASSEMBLY__
+
 void set_pgtable_section(u64 *page_table, u64 index,
-                        u64 section, u64 memory_type);
+                        u64 section, u64 memory_type,
+                        u64 attribute);
+void set_pgtable_table(u64 *page_table, u64 index,
+                      u64 *table_addr);
+
 static inline void set_ttbr_tcr_mair(int el, u64 table, u64 tcr, u64 attr)
 {
        asm volatile("dsb sy");