fsl-layerscape: fix compile error with sec fw disabled

[oweals/u-boot.git] / arch / arm / include / asm / armv7m.h

diff --git a/arch/arm/include/asm/armv7m.h b/arch/arm/include/asm/armv7m.h
index 9a6224f96ea1a638d191aa6cf019b1c36339ec70..ad67b4fa34e0c6409b6998a4e76125d722afd0df 100644 (file)
--- a/arch/arm/include/asm/armv7m.h
+++ b/arch/arm/include/asm/armv7m.h
@@ -1,21 +1,15 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
 /*
  * (C) Copyright 2010,2011
  * Vladimir Khusainov, Emcraft Systems, vlad@emcraft.com
  *
  * (C) Copyright 2015
  * Kamil Lulko, <kamil.lulko@gmail.com>
- *
- * SPDX-License-Identifier:    GPL-2.0+
  */
 
 #ifndef ARMV7M_H
 #define ARMV7M_H
 
-#if defined(__ASSEMBLY__)
-.syntax unified
-.thumb
-#endif
-
 /* armv7m fixed base addresses */
 #define V7M_SCS_BASE           0xE000E000
 #define V7M_NVIC_BASE          (V7M_SCS_BASE + 0x0100)
@@ -70,25 +64,5 @@ struct v7m_mpu {
 };
 #define V7M_MPU                                ((struct v7m_mpu *)V7M_MPU_BASE)
 
-#define V7M_MPU_CTRL_ENABLE            (1 << 0)
-#define V7M_MPU_CTRL_HFNMIENA          (1 << 1)
-
-#define V7M_MPU_CTRL_ENABLE            (1 << 0)
-#define V7M_MPU_CTRL_DISABLE           (0 << 0)
-#define V7M_MPU_CTRL_HFNMIENA          (1 << 1)
-
-#define V7M_MPU_RASR_EN                        (1 << 0)
-#define V7M_MPU_RASR_SIZE_BITS         1
-#define V7M_MPU_RASR_SIZE_4GB          (31 << V7M_MPU_RASR_SIZE_BITS)
-#define V7M_MPU_RASR_SIZE_8MB          (22 << V7M_MPU_RASR_SIZE_BITS)
-
-#define V7M_MPU_RASR_TEX_SHIFT 19
-#define V7M_MPU_RASR_S_SHIFT           18
-#define V7M_MPU_RASR_C_SHIFT           17
-#define V7M_MPU_RASR_B_SHIFT           16
-#define V7M_MPU_RASR_AP_RW_RW          (3 << 24)
-#define V7M_MPU_RASR_XN_ENABLE (0 << 28)
-#define V7M_MPU_RASR_XN_DISABLE (1 << 28)
-
 #endif /* !defined(__ASSEMBLY__) */
 #endif /* ARMV7M_H */