#define TEGRA_MMC_CLKCON_SDCLK_FREQ_SEL_SHIFT 8
#define TEGRA_MMC_CLKCON_SDCLK_FREQ_SEL_MASK (0xff << 8)
+#define TEGRA_MMC_MISCON_ENABLE_EXT_LOOPBACK (1 << 17)
+
#define TEGRA_MMC_SWRST_SW_RESET_FOR_ALL (1 << 0)
#define TEGRA_MMC_SWRST_SW_RESET_FOR_CMD_LINE (1 << 1)
#define TEGRA_MMC_SWRST_SW_RESET_FOR_DAT_LINE (1 << 2)
#define AUTO_CAL_PD_OFFSET (0x70 << 8)
#define AUTO_CAL_PU_OFFSET (0x62 << 0)
-struct mmc_host {
- struct tegra_mmc *reg;
- int id; /* device id/number, 0-3 */
- int enabled; /* 1 to enable, 0 to disable */
- int width; /* Bus Width, 1, 4 or 8 */
-#ifdef CONFIG_TEGRA186
- struct reset_ctl reset_ctl;
- struct clk clk;
-#else
- enum periph_id mmc_id; /* Peripheral ID: PERIPH_ID_... */
-#endif
- struct gpio_desc cd_gpio; /* Change Detect GPIO */
- struct gpio_desc pwr_gpio; /* Power GPIO */
- struct gpio_desc wp_gpio; /* Write Protect GPIO */
- unsigned int version; /* SDHCI spec. version */
- unsigned int clock; /* Current clock (MHz) */
- struct mmc_config cfg; /* mmc configuration */
-};
-
#endif /* __ASSEMBLY__ */
#endif /* __TEGRA_MMC_H_ */