imx6: Add include guards for include/asm/arch-mx6/sys_proto.h file

[oweals/u-boot.git] / arch / arm / include / asm / arch-tegra / pinmux.h

diff --git a/arch/arm/include/asm/arch-tegra/pinmux.h b/arch/arm/include/asm/arch-tegra/pinmux.h
index cb61aa1fa185af15dadc43984670d08b64e927f1..65eb37334e952a44e37e1ac577975f2924386c78 100644 (file)
--- a/arch/arm/include/asm/arch-tegra/pinmux.h
+++ b/arch/arm/include/asm/arch-tegra/pinmux.h
@@ -8,6 +8,8 @@
 #ifndef _TEGRA_PINMUX_H_
 #define _TEGRA_PINMUX_H_
 
+#include <linux/types.h>
+
 #include <asm/arch/tegra.h>
 
 /* The pullup/pulldown state of a pin group */
@@ -63,6 +65,43 @@ enum pmux_pin_rcv_sel {
 };
 #endif
 
+#ifdef TEGRA_PMX_PINS_HAVE_E_IO_HV
+enum pmux_pin_e_io_hv {
+       PMUX_PIN_E_IO_HV_DEFAULT = 0,
+       PMUX_PIN_E_IO_HV_NORMAL,
+       PMUX_PIN_E_IO_HV_HIGH,
+};
+#endif
+
+#ifdef TEGRA_PMX_GRPS_HAVE_LPMD
+/* Defines a pin group cfg's low-power mode select */
+enum pmux_lpmd {
+       PMUX_LPMD_X8 = 0,
+       PMUX_LPMD_X4,
+       PMUX_LPMD_X2,
+       PMUX_LPMD_X,
+       PMUX_LPMD_NONE = -1,
+};
+#endif
+
+#if defined(TEGRA_PMX_PINS_HAVE_SCHMT) || defined(TEGRA_PMX_GRPS_HAVE_SCHMT)
+/* Defines whether a pin group cfg's schmidt is enabled or not */
+enum pmux_schmt {
+       PMUX_SCHMT_DISABLE = 0,
+       PMUX_SCHMT_ENABLE = 1,
+       PMUX_SCHMT_NONE = -1,
+};
+#endif
+
+#if defined(TEGRA_PMX_PINS_HAVE_HSM) || defined(TEGRA_PMX_GRPS_HAVE_HSM)
+/* Defines whether a pin group cfg's high-speed mode is enabled or not */
+enum pmux_hsm {
+       PMUX_HSM_DISABLE = 0,
+       PMUX_HSM_ENABLE = 1,
+       PMUX_HSM_NONE = -1,
+};
+#endif
+
 /*
  * This defines the configuration for a pin, including the function assigned,
  * pull up/down settings and tristate settings. Having set up one of these
@@ -90,6 +129,15 @@ struct pmux_pingrp_config {
        u32 rcv_sel:2;          /* select between High and Normal  */
                                /* VIL/VIH receivers */
 #endif
+#ifdef TEGRA_PMX_PINS_HAVE_E_IO_HV
+       u32 e_io_hv:2;          /* select 3.3v tolerant receivers */
+#endif
+#ifdef TEGRA_PMX_PINS_HAVE_SCHMT
+       u32 schmt:2;            /* schmitt enable            */
+#endif
+#ifdef TEGRA_PMX_PINS_HAVE_HSM
+       u32 hsm:2;              /* high-speed mode enable    */
+#endif
 };
 
 #ifdef TEGRA_PMX_SOC_HAS_IO_CLAMPING
@@ -124,6 +172,16 @@ void pinmux_set_io(enum pmux_pingrp pin, enum pmux_pin_io io);
 void pinmux_config_pingrp_table(const struct pmux_pingrp_config *config,
                                int len);
 
+struct pmux_pingrp_desc {
+       u8 funcs[4];
+#if defined(CONFIG_TEGRA20)
+       u8 ctl_id;
+       u8 pull_id;
+#endif /* CONFIG_TEGRA20 */
+};
+
+extern const struct pmux_pingrp_desc *tegra_soc_pingroups;
+
 #ifdef TEGRA_PMX_SOC_HAS_DRVGRPS
 
 #define PMUX_SLWF_MIN  0
@@ -142,35 +200,6 @@ void pinmux_config_pingrp_table(const struct pmux_pingrp_config *config,
 #define PMUX_DRVDN_MAX 127
 #define PMUX_DRVDN_NONE        -1
 
-#ifdef TEGRA_PMX_GRPS_HAVE_LPMD
-/* Defines a pin group cfg's low-power mode select */
-enum pmux_lpmd {
-       PMUX_LPMD_X8 = 0,
-       PMUX_LPMD_X4,
-       PMUX_LPMD_X2,
-       PMUX_LPMD_X,
-       PMUX_LPMD_NONE = -1,
-};
-#endif
-
-#ifdef TEGRA_PMX_GRPS_HAVE_SCHMT
-/* Defines whether a pin group cfg's schmidt is enabled or not */
-enum pmux_schmt {
-       PMUX_SCHMT_DISABLE = 0,
-       PMUX_SCHMT_ENABLE = 1,
-       PMUX_SCHMT_NONE = -1,
-};
-#endif
-
-#ifdef TEGRA_PMX_GRPS_HAVE_HSM
-/* Defines whether a pin group cfg's high-speed mode is enabled or not */
-enum pmux_hsm {
-       PMUX_HSM_DISABLE = 0,
-       PMUX_HSM_ENABLE = 1,
-       PMUX_HSM_NONE = -1,
-};
-#endif
-
 /*
  * This defines the configuration for a pin group's pad control config
  */
@@ -202,14 +231,20 @@ void pinmux_config_drvgrp_table(const struct pmux_drvgrp_config *config,
 
 #endif /* TEGRA_PMX_SOC_HAS_DRVGRPS */
 
-struct pmux_pingrp_desc {
-       u8 funcs[4];
-#if defined(CONFIG_TEGRA20)
-       u8 ctl_id;
-       u8 pull_id;
-#endif /* CONFIG_TEGRA20 */
+#ifdef TEGRA_PMX_SOC_HAS_MIPI_PAD_CTRL_GRPS
+struct pmux_mipipadctrlgrp_config {
+       u32 grp:16;     /* pin group PMUX_MIPIPADCTRLGRP_x   */
+       u32 func:8;     /* function to assign PMUX_FUNC_... */
 };
 
-extern const struct pmux_pingrp_desc *tegra_soc_pingroups;
+void pinmux_config_mipipadctrlgrp_table(
+       const struct pmux_mipipadctrlgrp_config *config, int len);
+
+struct pmux_mipipadctrlgrp_desc {
+       u8 funcs[2];
+};
+
+extern const struct pmux_mipipadctrlgrp_desc *tegra_soc_mipipadctrl_groups;
+#endif /* TEGRA_PMX_SOC_HAS_MIPI_PAD_CTRL_GRPS */
 
 #endif /* _TEGRA_PINMUX_H_ */