ARM: DRA7: Add support for IO delay configuration

[oweals/u-boot.git] / arch / arm / include / asm / arch-sunxi / clock_sun9i.h

diff --git a/arch/arm/include/asm/arch-sunxi/clock_sun9i.h b/arch/arm/include/asm/arch-sunxi/clock_sun9i.h
index c506b0a98f4f927cffea964929906a0c1e4164ee..a61934fb366173ca2682d880d9386091a5123c2f 100644 (file)
--- a/arch/arm/include/asm/arch-sunxi/clock_sun9i.h
+++ b/arch/arm/include/asm/arch-sunxi/clock_sun9i.h
@@ -42,7 +42,7 @@ struct sunxi_ccm_reg {
        u32 clk_output_b;       /* 0x184 clk_output_a */
        u8 reserved5[0x278];    /* 0x188 */
 
-       u32 nand0_clk_cfg0;     /* 0x400 nand0 clock configuration0 */
+       u32 nand0_clk_cfg;      /* 0x400 nand0 clock configuration0 */
        u32 nand0_clk_cfg1;     /* 0x404 nand1 clock configuration */
        u8 reserved6[0x08];     /* 0x408 */
        u32 sd0_clk_cfg;        /* 0x410 sd0 clock configuration */
@@ -113,8 +113,12 @@ struct sunxi_ccm_reg {
 
 /* ahb_gate0 fields */
 /* On sun9i all sdc-s share their ahb gate, so ignore (x) */
+#define AHB_GATE_OFFSET_NAND0          13
 #define AHB_GATE_OFFSET_MMC(x)         8
 
+/* ahb gate1 field */
+#define AHB_GATE_OFFSET_DMA            24
+
 /* apb1_gate fields */
 #define APB1_GATE_UART_SHIFT           16
 #define APB1_GATE_UART_MASK            (0xff << APB1_GATE_UART_SHIFT)