Merge tag 'signed-efi-next' of git://github.com/agraf/u-boot

[oweals/u-boot.git] / arch / arm / include / asm / arch-stm32f7 / stm32.h

diff --git a/arch/arm/include/asm/arch-stm32f7/stm32.h b/arch/arm/include/asm/arch-stm32f7/stm32.h
index a425178bc005b315f0ae8e03324a9c79339e03c2..87aee6057b283aca37d73ce342ba5530522feac4 100644 (file)
--- a/arch/arm/include/asm/arch-stm32f7/stm32.h
+++ b/arch/arm/include/asm/arch-stm32f7/stm32.h
@@ -49,7 +49,7 @@
 #define FLASH_CNTL_BASE                (AHB1_PERIPH_BASE + 0x3C00)
 
 
-#define SDRAM_FMC_BASE         (AHB3_PERIPH_BASE + 0x4A0000140)
+#define SDRAM_FMC_BASE         (AHB3_PERIPH_BASE + 0x40000140)
 
 static const u32 sect_sz_kb[CONFIG_SYS_MAX_FLASH_SECT] = {
        [0 ... 3] =     32 * 1024,
@@ -57,12 +57,6 @@ static const u32 sect_sz_kb[CONFIG_SYS_MAX_FLASH_SECT] = {
        [5 ... 7] =     256 * 1024
 };
 
-enum clock {
-       CLOCK_CORE,
-       CLOCK_AHB,
-       CLOCK_APB1,
-       CLOCK_APB2
-};
 #define STM32_BUS_MASK         GENMASK(31, 16)
 
 struct stm32_rcc_regs {
@@ -101,11 +95,6 @@ struct stm32_rcc_regs {
 };
 #define STM32_RCC              ((struct stm32_rcc_regs *)RCC_BASE)
 
-struct stm32_rcc_ext_f7_regs {
-       u32 dckcfgr2;   /* dedicated clocks configuration register */
-};
-#define STM32_RCC_EXT_F7       ((struct stm32_rcc_ext_f7_regs *) (RCC_BASE + sizeof(struct stm32_rcc_regs)))
-
 struct stm32_pwr_regs {
        u32 cr1;   /* power control register 1 */
        u32 csr1;  /* power control/status register 2 */
@@ -114,8 +103,6 @@ struct stm32_pwr_regs {
 };
 #define STM32_PWR              ((struct stm32_pwr_regs *)PWR_BASE)
 
-int configure_clocks(void);
-unsigned long clock_get(enum clock clck);
 void stm32_flash_latency_cfg(int latency);
 
 #endif /* _ASM_ARCH_HARDWARE_H */