Merge branch 'master' of git://git.denx.de/u-boot-imx

[oweals/u-boot.git] / arch / arm / include / asm / arch-rockchip / grf_rk3399.h

diff --git a/arch/arm/include/asm/arch-rockchip/grf_rk3399.h b/arch/arm/include/asm/arch-rockchip/grf_rk3399.h
index 2e0e7fe58ce9afbc67f5f2d477271f59bbd87e2f..eda99560ed3039c8769e9f68ab6ef0b1c56b6931 100644 (file)
--- a/arch/arm/include/asm/arch-rockchip/grf_rk3399.h
+++ b/arch/arm/include/asm/arch-rockchip/grf_rk3399.h
@@ -440,9 +440,11 @@ enum {
        GRF_GPIO4C0_SEL_SHIFT   = 0,
        GRF_GPIO4C0_SEL_MASK    = 3 << GRF_GPIO4C0_SEL_SHIFT,
        GRF_UART2DGBB_SIN       = 2,
+       GRF_HDMII2C_SCL         = 3,
        GRF_GPIO4C1_SEL_SHIFT   = 2,
        GRF_GPIO4C1_SEL_MASK    = 3 << GRF_GPIO4C1_SEL_SHIFT,
        GRF_UART2DGBB_SOUT      = 2,
+       GRF_HDMII2C_SDA         = 3,
        GRF_GPIO4C2_SEL_SHIFT   = 4,
        GRF_GPIO4C2_SEL_MASK    = 3 << GRF_GPIO4C2_SEL_SHIFT,
        GRF_PWM_0               = 1,
@@ -523,9 +525,32 @@ enum {
        GRF_GPIO3C7_E_MASK = 7 << GRF_GPIO3C7_E_SHIFT,
 
        /* GRF_SOC_CON7 */
-       GRF_UART_DBG_SEL_SHIFT  = 10,
-       GRF_UART_DBG_SEL_MASK   = 3 << GRF_UART_DBG_SEL_SHIFT,
-       GRF_UART_DBG_SEL_C      = 2,
+       GRF_UART_DBG_SEL_SHIFT  = 10,
+       GRF_UART_DBG_SEL_MASK   = 3 << GRF_UART_DBG_SEL_SHIFT,
+       GRF_UART_DBG_SEL_C      = 2,
+
+       /* GRF_SOC_CON20 */
+       GRF_DSI0_VOP_SEL_SHIFT  = 0,
+       GRF_DSI0_VOP_SEL_MASK   = 1 << GRF_DSI0_VOP_SEL_SHIFT,
+       GRF_DSI0_VOP_SEL_B      = 0,
+       GRF_DSI0_VOP_SEL_L      = 1,
+
+       /* GRF_SOC_CON22 */
+       GRF_DPHY_TX0_RXMODE_SHIFT = 0,
+       GRF_DPHY_TX0_RXMODE_MASK  = 0xf << GRF_DPHY_TX0_RXMODE_SHIFT,
+       GRF_DPHY_TX0_RXMODE_EN    = 0xb,
+       GRF_DPHY_TX0_RXMODE_DIS   = 0,
+
+       GRF_DPHY_TX0_TXSTOPMODE_SHIFT = 4,
+       GRF_DPHY_TX0_TXSTOPMODE_MASK  = 0xf0 << GRF_DPHY_TX0_TXSTOPMODE_SHIFT,
+       GRF_DPHY_TX0_TXSTOPMODE_EN    = 0xc,
+       GRF_DPHY_TX0_TXSTOPMODE_DIS   = 0,
+
+       GRF_DPHY_TX0_TURNREQUEST_SHIFT = 12,
+       GRF_DPHY_TX0_TURNREQUEST_MASK  =
+               0xf000 << GRF_DPHY_TX0_TURNREQUEST_SHIFT,
+       GRF_DPHY_TX0_TURNREQUEST_EN    = 0x1,
+       GRF_DPHY_TX0_TURNREQUEST_DIS   = 0,
 
        /*  PMUGRF_GPIO0A_IOMUX */
        PMUGRF_GPIO0A6_SEL_SHIFT        = 12,