am33xx: init OTG hardware and new musb gadget driver

[oweals/u-boot.git] / arch / arm / include / asm / arch-omap4 / clocks.h

diff --git a/arch/arm/include/asm/arch-omap4/clocks.h b/arch/arm/include/asm/arch-omap4/clocks.h
index cd304e86842e9e6f3f5ecc131f05d934d5a1e5df..be20fc0ce66a6abbf69393f5675ae98291c6bcd5 100644 (file)
--- a/arch/arm/include/asm/arch-omap4/clocks.h
+++ b/arch/arm/include/asm/arch-omap4/clocks.h
@@ -525,6 +525,11 @@ struct omap4_scrm_regs {
 
 #define DPLL_CLKOUT_DIV_MASK   0x1F /* post-divider mask */
 
+/* CM_DLL_CTRL */
+#define CM_DLL_CTRL_OVERRIDE_SHIFT     0
+#define CM_DLL_CTRL_OVERRIDE_MASK      (1 << 0)
+#define CM_DLL_CTRL_NO_OVERRIDE                0
+
 /* CM_CLKMODE_DPLL */
 #define CM_CLKMODE_DPLL_REGM4XEN_SHIFT         11
 #define CM_CLKMODE_DPLL_REGM4XEN_MASK          (1 << 11)
@@ -652,23 +657,9 @@ struct omap4_scrm_regs {
 #define OMAP_SYS_CLK_IND_38_4_MHZ      6
 #define OMAP_32K_CLK_FREQ              32768
 
-/* PRM_VC_CFG_I2C_CLK */
-#define PRM_VC_CFG_I2C_CLK_SCLH_SHIFT          0
-#define PRM_VC_CFG_I2C_CLK_SCLH_MASK           0xFF
-#define PRM_VC_CFG_I2C_CLK_SCLL_SHIFT          8
-#define PRM_VC_CFG_I2C_CLK_SCLL_MASK           (0xFF << 8)
-
 /* PRM_VC_VAL_BYPASS */
 #define PRM_VC_I2C_CHANNEL_FREQ_KHZ    400
 
-#define PRM_VC_VAL_BYPASS_VALID_BIT    0x1000000
-#define PRM_VC_VAL_BYPASS_SLAVEADDR_SHIFT      0
-#define PRM_VC_VAL_BYPASS_SLAVEADDR_MASK       0x7F
-#define PRM_VC_VAL_BYPASS_REGADDR_SHIFT                8
-#define PRM_VC_VAL_BYPASS_REGADDR_MASK         0xFF
-#define PRM_VC_VAL_BYPASS_DATA_SHIFT           16
-#define PRM_VC_VAL_BYPASS_DATA_MASK            0xFF
-
 /* SMPS */
 #define SMPS_I2C_SLAVE_ADDR    0x12
 #define SMPS_REG_ADDR_VCORE1   0x55
@@ -754,10 +745,10 @@ extern struct omap4_prcm_regs *const prcm;
 extern const u32 sys_clk_array[8];
 
 void scale_vcores(void);
-void do_scale_tps62361(u32 reg, u32 volt_mv);
+void do_scale_tps62361(int gpio, u32 reg, u32 volt_mv);
+u32 get_offset_code(u32 offset);
 u32 omap_ddr_clk(void);
 void do_scale_vcore(u32 vcore_reg, u32 volt_mv);
-void setup_sri2c(void);
 void setup_post_dividers(u32 *const base, const struct dpll_params *params);
 u32 get_sys_clk_index(void);
 void enable_basic_clocks(void);