Merge branch 'master' of git://www.denx.de/git/u-boot-imx

[oweals/u-boot.git] / arch / arm / include / asm / arch-omap3 / cpu.h

diff --git a/arch/arm/include/asm/arch-omap3/cpu.h b/arch/arm/include/asm/arch-omap3/cpu.h
index 84308e04b352b48e519c57ff47a1cdb1f535eed1..53cc2b098a0a4585a36629e0b9f0d08fb9b5cd55 100644 (file)
--- a/arch/arm/include/asm/arch-omap3/cpu.h
+++ b/arch/arm/include/asm/arch-omap3/cpu.h
@@ -2,24 +2,7 @@
  * (C) Copyright 2006-2008
  * Texas Instruments, <www.ti.com>
  *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- *
+ * SPDX-License-Identifier:    GPL-2.0+
  */
 
 #ifndef _CPU_H
@@ -94,53 +77,7 @@ struct ctrl_id {
 #define GPMC_CONFIG_CS0_BASE   (GPMC_BASE + GPMC_CONFIG_CS0)
 
 #ifndef __KERNEL_STRICT_NAMES
-#ifndef __ASSEMBLY__
-struct gpmc_cs {
-       u32 config1;            /* 0x00 */
-       u32 config2;            /* 0x04 */
-       u32 config3;            /* 0x08 */
-       u32 config4;            /* 0x0C */
-       u32 config5;            /* 0x10 */
-       u32 config6;            /* 0x14 */
-       u32 config7;            /* 0x18 */
-       u32 nand_cmd;           /* 0x1C */
-       u32 nand_adr;           /* 0x20 */
-       u32 nand_dat;           /* 0x24 */
-       u8 res[8];              /* blow up to 0x30 byte */
-};
-
-struct gpmc {
-       u8 res1[0x10];
-       u32 sysconfig;          /* 0x10 */
-       u8 res2[0x4];
-       u32 irqstatus;          /* 0x18 */
-       u32 irqenable;          /* 0x1C */
-       u8 res3[0x20];
-       u32 timeout_control;    /* 0x40 */
-       u8 res4[0xC];
-       u32 config;             /* 0x50 */
-       u32 status;             /* 0x54 */
-       u8 res5[0x8];   /* 0x58 */
-       struct gpmc_cs cs[8];   /* 0x60, 0x90, .. */
-       u8 res6[0x14];          /* 0x1E0 */
-       u32 ecc_config;         /* 0x1F4 */
-       u32 ecc_control;        /* 0x1F8 */
-       u32 ecc_size_config;    /* 0x1FC */
-       u32 ecc1_result;        /* 0x200 */
-       u32 ecc2_result;        /* 0x204 */
-       u32 ecc3_result;        /* 0x208 */
-       u32 ecc4_result;        /* 0x20C */
-       u32 ecc5_result;        /* 0x210 */
-       u32 ecc6_result;        /* 0x214 */
-       u32 ecc7_result;        /* 0x218 */
-       u32 ecc8_result;        /* 0x21C */
-       u32 ecc9_result;        /* 0x220 */
-};
-
-/* Used for board specific gpmc initialization */
-extern struct gpmc *gpmc_cfg;
-
-#else /* __ASSEMBLY__ */
+#ifdef __ASSEMBLY__
 #define GPMC_CONFIG1           0x00
 #define GPMC_CONFIG2           0x04
 #define GPMC_CONFIG3           0x08
@@ -161,7 +98,6 @@ extern struct gpmc *gpmc_cfg;
 #define DEBUG_BASE             0x08000000      /* debug board */
 #define NAND_BASE              0x30000000      /* NAND addr */
                                                /* (actual size small port) */
-#define PISMO2_BASE            0x18000000      /* PISMO2 CS1/2 */
 #define ONENAND_MAP            0x20000000      /* OneNand addr */
                                                /* (actual size small port) */
 /* SMS */
@@ -474,12 +410,13 @@ struct prm {
        u8 res3[0x1c];
        u32 clksrc_ctrl;        /* 0x1270 */
 };
-#else /* __ASSEMBLY__ */
-#define PRM_RSTCTRL            0x48307250
-#define PRM_RSTCTRL_RESET      0x04
 #endif /* __ASSEMBLY__ */
 #endif /* __KERNEL_STRICT_NAMES */
 
+#define PRM_RSTCTRL            0x48307250
+#define PRM_RSTCTRL_RESET      0x04
+#define PRM_RSTST                      0x48307258
+#define PRM_RSTST_WARM_RESET_MASK      0x7D2
 #define SYSCLKDIV_1            (0x1 << 6)
 #define SYSCLKDIV_2            (0x1 << 7)