+/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Freescale i.MX28 CLKCTRL Register Definitions
*
*
* Based on code from LTIB:
* Copyright 2008-2010 Freescale Semiconductor, Inc. All Rights Reserved.
- *
- * SPDX-License-Identifier: GPL-2.0+
*/
#ifndef __MX28_REGS_CLKCTRL_H__
#define __MX28_REGS_CLKCTRL_H__
-#include <asm/imx-common/regs-common.h>
+#include <asm/mach-imx/regs-common.h>
#ifndef __ASSEMBLY__
struct mxs_clkctrl_regs {
mxs_reg_32(hw_clkctrl_hbus) /* 0x60 */
mxs_reg_32(hw_clkctrl_xbus) /* 0x70 */
mxs_reg_32(hw_clkctrl_xtal) /* 0x80 */
- mxs_reg_32(hw_clkctrl_ssp0) /* 0x90 */
- mxs_reg_32(hw_clkctrl_ssp1) /* 0xa0 */
- mxs_reg_32(hw_clkctrl_ssp2) /* 0xb0 */
- mxs_reg_32(hw_clkctrl_ssp3) /* 0xc0 */
- mxs_reg_32(hw_clkctrl_gpmi) /* 0xd0 */
+ uint32_t hw_clkctrl_ssp0; /* 0x90 */
+ uint32_t reserved_ssp0[3]; /* 0x94-0x9c */
+ uint32_t hw_clkctrl_ssp1; /* 0xa0 */
+ uint32_t reserved_ssp1[3]; /* 0xa4-0xac */
+ uint32_t hw_clkctrl_ssp2; /* 0xb0 */
+ uint32_t reserved_ssp2[3]; /* 0xb4-0xbc */
+ uint32_t hw_clkctrl_ssp3; /* 0xc0 */
+ uint32_t reserved_ssp3[3]; /* 0xc4-0xcc */
+ uint32_t hw_clkctrl_gpmi; /* 0xd0 */
+ uint32_t reserved_gpmi[3]; /* 0xd4-0xdc */
mxs_reg_32(hw_clkctrl_spdif) /* 0xe0 */
mxs_reg_32(hw_clkctrl_emi) /* 0xf0 */
mxs_reg_32(hw_clkctrl_saif0) /* 0x100 */