fsl-layerscape: fix compile error with sec fw disabled

[oweals/u-boot.git] / arch / arm / include / asm / arch-mxs / clock.h

diff --git a/arch/arm/include/asm/arch-mxs/clock.h b/arch/arm/include/asm/arch-mxs/clock.h
index d3927c7a55b5fb27cb4ac2519debb2f9d2e81079..ee56d10fec2bf9bfda2f67a3750f88dd0035c9e0 100644 (file)
--- a/arch/arm/include/asm/arch-mxs/clock.h
+++ b/arch/arm/include/asm/arch-mxs/clock.h
@@ -1,23 +1,9 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
 /*
- * Freescale i.MX28 Clock
+ * Freescale i.MX23/i.MX28 Clock
  *
  * Copyright (C) 2011 Marek Vasut <marek.vasut@gmail.com>
  * on behalf of DENX Software Engineering GmbH
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
- *
  */
 
 #ifndef __CLOCK_H__
@@ -31,11 +17,13 @@ enum mxc_clock {
        MXC_GPMI_CLK,
        MXC_IO0_CLK,
        MXC_IO1_CLK,
+       MXC_XTAL_CLK,
        MXC_SSP0_CLK,
+#ifdef CONFIG_MX28
        MXC_SSP1_CLK,
        MXC_SSP2_CLK,
        MXC_SSP3_CLK,
-       MXC_XTAL_CLK,
+#endif
 };
 
 enum mxs_ioclock {
@@ -45,9 +33,11 @@ enum mxs_ioclock {
 
 enum mxs_sspclock {
        MXC_SSPCLK0 = 0,
+#ifdef CONFIG_MX28
        MXC_SSPCLK1,
        MXC_SSPCLK2,
        MXC_SSPCLK3,
+#endif
 };
 
 uint32_t mxc_get_clock(enum mxc_clock clk);
@@ -55,6 +45,7 @@ uint32_t mxc_get_clock(enum mxc_clock clk);
 void mxs_set_ioclk(enum mxs_ioclock io, uint32_t freq);
 void mxs_set_sspclk(enum mxs_sspclock ssp, uint32_t freq, int xtal);
 void mxs_set_ssp_busclock(unsigned int bus, uint32_t freq);
+void mxs_set_lcdclk(uint32_t __maybe_unused lcd_base, uint32_t freq);
 
 /* Compatibility with the FEC Ethernet driver */
 #define        imx_get_fecclk()        mxc_get_clock(MXC_AHB_CLK)