CONFIG_SYS_FSL_JR0_OFFSET)
#define CONFIG_SYS_FSL_MAX_NUM_OF_SEC 1
#if !(defined(__KERNEL_STRICT_NAMES) || defined(__ASSEMBLY__))
-#include <asm/imx-common/regs-lcdif.h>
+#include <asm/mach-imx/regs-lcdif.h>
#include <asm/types.h>
extern void imx_get_mac_from_fuse(int dev_id, unsigned char *mac);
#define SRC_M4RCR_M4C_NON_SCLR_RST_MASK (1 << 0)
#define SRC_M4RCR_ENABLE_M4_OFFSET 3
#define SRC_M4RCR_ENABLE_M4_MASK (1 << 3)
+#define SRC_DDRC_RCR_DDRC_CORE_RST_OFFSET 1
+#define SRC_DDRC_RCR_DDRC_CORE_RST_MASK (1 << 1)
/* GPR0 Bit Fields */
#define IOMUXC_GPR_GPR0_DMAREQ_MUX_SEL0_MASK 0x1u