Merge branch 'master' of https://gitlab.denx.de/u-boot/custodians/u-boot-net

[oweals/u-boot.git] / arch / arm / include / asm / arch-mx6 / sys_proto.h

diff --git a/arch/arm/include/asm/arch-mx6/sys_proto.h b/arch/arm/include/asm/arch-mx6/sys_proto.h
index c5832912b4221f21ce9e958d15040a2dc9490f5a..1e5fa1a75ebc489e69dbbe7641675eecb374f4e0 100644 (file)
--- a/arch/arm/include/asm/arch-mx6/sys_proto.h
+++ b/arch/arm/include/asm/arch-mx6/sys_proto.h
@@ -1,49 +1,41 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
 /*
  * (C) Copyright 2009
  * Stefano Babic, DENX Software Engineering, sbabic@denx.de.
- *
- * SPDX-License-Identifier:    GPL-2.0+
  */
 
-#ifndef _SYS_PROTO_H_
-#define _SYS_PROTO_H_
+#ifndef __SYS_PROTO_IMX6_
+#define __SYS_PROTO_IMX6_
 
-#include <asm/imx-common/regs-common.h>
-#include "../arch-imx/cpu.h"
+#include <asm/mach-imx/sys_proto.h>
+#include <asm/arch/iomux.h>
 
-#define soc_rev() (get_cpu_rev() & 0xFF)
-#define is_soc_rev(rev)        (soc_rev() - rev)
+#define USBPHY_PWD             0x00000000
 
-u32 get_nr_cpus(void);
-u32 get_cpu_rev(void);
-u32 get_cpu_speed_grade_hz(void);
-u32 get_cpu_temp_grade(int *minc, int *maxc);
+#define USBPHY_PWD_RXPWDRX     (1 << 20) /* receiver block power down */
 
-/* returns MXC_CPU_ value */
-#define cpu_type(rev) (((rev) >> 12)&0xff)
+#define is_usbotg_phy_active(void) (!(readl(USB_PHY0_BASE_ADDR + USBPHY_PWD) & \
+                                  USBPHY_PWD_RXPWDRX))
 
-/* both macros return/take MXC_CPU_ constants */
-#define get_cpu_type() (cpu_type(get_cpu_rev()))
-#define is_cpu_type(cpu) (get_cpu_type() == cpu)
+int imx6_pcie_toggle_power(void);
+int imx6_pcie_toggle_reset(void);
 
-const char *get_imx_type(u32 imxtype);
-unsigned imx_ddr_size(void);
-void set_chipselect_size(int const);
+enum ldo_reg {
+       LDO_ARM,
+       LDO_SOC,
+       LDO_PU,
+};
 
-/*
- * Initializes on-chip ethernet controllers.
- * to override, implement board_eth_init()
+int set_ldo_voltage(enum ldo_reg ldo, u32 mv);
+
+/**
+ * iomuxc_set_rgmii_io_voltage - set voltage level of RGMII/USB pins
+ *
+ * @param io_vol - the voltage IO level of pins
  */
+static inline void iomuxc_set_rgmii_io_voltage(int io_vol)
+{
+       __raw_writel(io_vol, IOMUXC_SW_PAD_CTL_GRP_DDR_TYPE_RGMII);
+}
 
-int fecmxc_initialize(bd_t *bis);
-u32 get_ahb_clk(void);
-u32 get_periph_clk(void);
-
-int mxs_reset_block(struct mxs_register_32 *reg);
-int mxs_wait_mask_set(struct mxs_register_32 *reg,
-                      uint32_t mask,
-                      unsigned int timeout);
-int mxs_wait_mask_clr(struct mxs_register_32 *reg,
-                      uint32_t mask,
-                      unsigned int timeout);
-#endif
+#endif /* __SYS_PROTO_IMX6_ */