arm: Move check_cache_range() into a common place

[oweals/u-boot.git] / arch / arm / include / asm / arch-lpc32xx / cpu.h

diff --git a/arch/arm/include/asm/arch-lpc32xx/cpu.h b/arch/arm/include/asm/arch-lpc32xx/cpu.h
index 199b4a026b9ac380c66c58d5d502b6a6f505f2f6..0de894bf97334b12050eb35eb25a4523a4684cbe 100644 (file)
--- a/arch/arm/include/asm/arch-lpc32xx/cpu.h
+++ b/arch/arm/include/asm/arch-lpc32xx/cpu.h
@@ -27,6 +27,7 @@
 #define HS_UART7_BASE  0x4001C000      /* High speed UART 7 registers base */
 #define RTC_BASE       0x40024000      /* RTC registers base               */
 #define GPIO_BASE      0x40028000      /* GPIO registers base              */
+#define MUX_BASE       0x40028000      /* MUX registers base               */
 #define WDT_BASE       0x4003C000      /* Watchdog timer registers base    */
 #define TIMER0_BASE    0x40044000      /* Timer0 registers base            */
 #define TIMER1_BASE    0x4004C000      /* Timer1 registers base            */
@@ -37,6 +38,8 @@
 #define UART4_BASE     0x40088000      /* UART 4 registers base            */
 #define UART5_BASE     0x40090000      /* UART 5 registers base            */
 #define UART6_BASE     0x40098000      /* UART 6 registers base            */
+#define I2C1_BASE      0x400A0000      /* I2C  1 registers base            */
+#define I2C2_BASE      0x400A8000      /* I2C  2 registers base            */
 
 /* External SDRAM Memory Bank base addresses */
 #define EMC_DYCS0_BASE 0x80000000      /* SDRAM DYCS0 base address         */