soc: keystone_serdes: enhance to use cmu/comlane/lane specific configurations

[oweals/u-boot.git] / arch / arm / include / asm / arch-keystone / hardware-k2hk.h

diff --git a/arch/arm/include/asm/arch-keystone/hardware-k2hk.h b/arch/arm/include/asm/arch-keystone/hardware-k2hk.h
index eb132f73e605dd3d189be6d899b6e896ddaeb364..28de3f5010703c0dc636ccad06263758f84385f4 100644 (file)
--- a/arch/arm/include/asm/arch-keystone/hardware-k2hk.h
+++ b/arch/arm/include/asm/arch-keystone/hardware-k2hk.h
@@ -10,8 +10,6 @@
 #ifndef __ASM_ARCH_HARDWARE_K2HK_H
 #define __ASM_ARCH_HARDWARE_K2HK_H
 
-#define KS2_MISC_CTRL                  (KS2_DEVICE_STATE_CTRL_BASE + 0xc7c)
-
 #define KS2_ARM_PLL_EN                 BIT(13)
 
 /* PA SS Registers */
@@ -81,7 +79,26 @@
 #define KS2_DDR3B_EMIF_DATA_BASE       0x60000000
 #define KS2_DDR3B_DDRPHYC              0x02328000
 
+/* SGMII SerDes */
+#define KS2_LANES_PER_SGMII_SERDES     4
+
 /* Number of DSP cores */
 #define KS2_NUM_DSPS                   8
 
+/* NETCP pktdma */
+#define KS2_NETCP_PDMA_CTRL_BASE       0x02004000
+#define KS2_NETCP_PDMA_TX_BASE         0x02004400
+#define KS2_NETCP_PDMA_TX_CH_NUM       9
+#define KS2_NETCP_PDMA_RX_BASE         0x02004800
+#define KS2_NETCP_PDMA_RX_CH_NUM       26
+#define KS2_NETCP_PDMA_SCHED_BASE      0x02004c00
+#define KS2_NETCP_PDMA_RX_FLOW_BASE    0x02005000
+#define KS2_NETCP_PDMA_RX_FLOW_NUM     32
+#define KS2_NETCP_PDMA_RX_FREE_QUEUE   4001
+#define KS2_NETCP_PDMA_RX_RCV_QUEUE    4002
+#define KS2_NETCP_PDMA_TX_SND_QUEUE    648
+
+/* NETCP */
+#define KS2_NETCP_BASE                 0x02000000
+
 #endif /* __ASM_ARCH_HARDWARE_H */