ls1028a: Configure stream IDs for integrated PCI and fix up Linux DT

[oweals/u-boot.git] / arch / arm / include / asm / arch-fsl-layerscape / stream_id_lsch3.h

diff --git a/arch/arm/include/asm/arch-fsl-layerscape/stream_id_lsch3.h b/arch/arm/include/asm/arch-fsl-layerscape/stream_id_lsch3.h
index 94ea99a349d516e4c99cd04a576724f3b7209ac0..01d362d1836517b84360bee67c99252e8349ce48 100644 (file)
--- a/arch/arm/include/asm/arch-fsl-layerscape/stream_id_lsch3.h
+++ b/arch/arm/include/asm/arch-fsl-layerscape/stream_id_lsch3.h
@@ -42,6 +42,10 @@
  *     -the MC is responsible for allocating and setting up 'isolation context
  *      IDs (ICIDs) based on the allocated stream IDs for all DPAA2 devices.
  *
+ *  - ECAM (integrated PCI)
+ *     - U-Boot applies the value here to HW and does DT fix-up for both
+ *       'iommu-map' and 'msi-map'
+ *
  * On Chasis-3 SoCs stream IDs are programmed in AMQ registers (32-bits) for
  * each of the different bus masters.  The relationship between
  * the AMQ registers and stream IDs is defined in the table below:
@@ -98,6 +102,10 @@
 #define FSL_DPAA2_STREAM_ID_START      23
 #define FSL_DPAA2_STREAM_ID_END                63
 
+/* PCI IEPs, this overlaps DPAA2 but these two are exclusive at least for now */
+#define FSL_ECAM_STREAM_ID_START       32
+#define FSL_ECAM_STREAM_ID_END         63
+
 #define FSL_SEC_STREAM_ID              64
 #define FSL_SEC_JR1_STREAM_ID          65
 #define FSL_SEC_JR2_STREAM_ID          66