armv8: fsl_lsch2: Add LS1046A SoC support

[oweals/u-boot.git] / arch / arm / include / asm / arch-fsl-layerscape / soc.h

diff --git a/arch/arm/include/asm/arch-fsl-layerscape/soc.h b/arch/arm/include/asm/arch-fsl-layerscape/soc.h
index ea78e15f49c9858af8c62696c45526be88efb8ae..8d4a7adb1d574aca4a9e3e13a8918dc0a9fc9c69 100644 (file)
--- a/arch/arm/include/asm/arch-fsl-layerscape/soc.h
+++ b/arch/arm/include/asm/arch-fsl-layerscape/soc.h
@@ -41,16 +41,22 @@ struct cpu_type {
        { .name = #n, .soc_ver = SVR_##v, .num_cores = (nc)}
 
 #define SVR_WO_E               0xFFFFFE
-#define SVR_LS1043             0x879204
-#define SVR_LS2045             0x870120
-#define SVR_LS2080             0x870110
-#define SVR_LS2085             0x870100
-#define SVR_LS2040             0x870130
+#define SVR_LS1012A            0x870400
+#define SVR_LS1043A            0x879200
+#define SVR_LS1023A            0x879208
+#define SVR_LS1046A            0x870700
+#define SVR_LS1026A            0x870708
+#define SVR_LS2045A            0x870120
+#define SVR_LS2080A            0x870110
+#define SVR_LS2085A            0x870100
+#define SVR_LS2040A            0x870130
 
 #define SVR_MAJ(svr)           (((svr) >> 4) & 0xf)
 #define SVR_MIN(svr)           (((svr) >> 0) & 0xf)
 #define SVR_SOC_VER(svr)       (((svr) >> 8) & SVR_WO_E)
 #define IS_E_PROCESSOR(svr)    (!((svr >> 8) & 0x1))
+#define IS_SVR_REV(svr, maj, min) \
+               ((SVR_MAJ(svr) == (maj)) && (SVR_MIN(svr) == (min)))
 
 /* ahci port register default value */
 #define AHCI_PORT_PHY_1_CFG    0xa003fffe
@@ -93,4 +99,7 @@ void cpu_name(char *name);
 #ifdef CONFIG_SYS_FSL_ERRATUM_A009635
 void erratum_a009635(void);
 #endif
+
+bool soc_has_dp_ddr(void);
+bool soc_has_aiop(void);
 #endif /* _ASM_ARMV8_FSL_LAYERSCAPE_SOC_H_ */