Merge git://git.denx.de/u-boot-samsung
[oweals/u-boot.git] / arch / arm / include / asm / arch-fsl-layerscape / immap_lsch3.h
index 7acba2730aac21e861161f14de9904c522fd759d..e18dcbdd0900348281a9042d4ff16d637020cc90 100644 (file)
 #define CONFIG_SYS_FSL_CH3_CLK_GRPA_ADDR       (CONFIG_SYS_IMMR + 0x00300000)
 #define CONFIG_SYS_FSL_CH3_CLK_GRPB_ADDR       (CONFIG_SYS_IMMR + 0x00310000)
 #define CONFIG_SYS_FSL_CH3_CLK_CTRL_ADDR       (CONFIG_SYS_IMMR + 0x00370000)
+#define SYS_FSL_QSPI_ADDR                      (CONFIG_SYS_IMMR + 0x010c0000)
 #define CONFIG_SYS_FSL_ESDHC_ADDR              (CONFIG_SYS_IMMR + 0x01140000)
 #define CONFIG_SYS_IFC_ADDR                    (CONFIG_SYS_IMMR + 0x01240000)
 #define CONFIG_SYS_NS16550_COM1                        (CONFIG_SYS_IMMR + 0x011C0500)
 #define CONFIG_SYS_NS16550_COM2                        (CONFIG_SYS_IMMR + 0x011C0600)
-#define CONFIG_SYS_FSL_TIMER_ADDR              0x023d0000
+#define SYS_FSL_LS2080A_LS2085A_TIMER_ADDR     0x023d0000
+#define CONFIG_SYS_FSL_TIMER_ADDR              0x023e0000
 #define CONFIG_SYS_FSL_PMU_CLTBENR             (CONFIG_SYS_FSL_PMU_ADDR + \
                                                 0x18A0)
 #define FSL_PMU_PCTBENR_OFFSET (CONFIG_SYS_FSL_PMU_ADDR + 0x8A0)
+#define FSL_LSCH3_SVR          (CONFIG_SYS_FSL_GUTS_ADDR + 0xA4)
 
 #define CONFIG_SYS_FSL_WRIOP1_ADDR             (CONFIG_SYS_IMMR + 0x7B80000)
 #define CONFIG_SYS_FSL_WRIOP1_MDIO1    (CONFIG_SYS_FSL_WRIOP1_ADDR + 0x16000)
 #define TP_CLUSTER_INIT_MASK   0x0000003f      /* initiator mask */
 #define TP_INIT_PER_CLUSTER     4
 /* This is chassis generation 3 */
-
+#ifndef __ASSEMBLY__
 struct sys_info {
        unsigned long freq_processor[CONFIG_MAX_CPUS];
        unsigned long freq_systembus;
@@ -317,6 +320,5 @@ struct ccsr_reset {
        u32 ip_rev2;                    /* 0xbfc */
 };
 
-uint get_svr(void);
-
+#endif /*__ASSEMBLY__*/
 #endif /* __ARCH_FSL_LSCH3_IMMAP_H_ */