Merge branch 'master' of git://git.denx.de/u-boot-fsl-qoriq

[oweals/u-boot.git] / arch / arm / include / asm / arch-fsl-layerscape / immap_lsch2.h

diff --git a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h
index 0bad0c70b847e1a68fab55d1a1c52cc5634a710c..e98e055d9f1150e29ddd20b88718f8afa8150d3c 100644 (file)
--- a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h
+++ b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h
@@ -37,8 +37,6 @@
 #define CONFIG_SYS_PCIE1_ADDR                  (CONFIG_SYS_IMMR + 0x2400000)
 #define CONFIG_SYS_PCIE2_ADDR                  (CONFIG_SYS_IMMR + 0x2500000)
 #define CONFIG_SYS_PCIE3_ADDR                  (CONFIG_SYS_IMMR + 0x2600000)
-#define CONFIG_SYS_FSL_SEC_ADDR                        (CONFIG_SYS_IMMR + 0x700000)
-#define CONFIG_SYS_FSL_JR0_ADDR                        (CONFIG_SYS_IMMR + 0x710000)
 #define CONFIG_SYS_SEC_MON_ADDR                        (CONFIG_SYS_IMMR + 0xe90000)
 #define CONFIG_SYS_SFP_ADDR                    (CONFIG_SYS_IMMR + 0xe80200)
 
@@ -62,7 +60,11 @@
 #define CONFIG_SYS_PCIE2_PHYS_ADDR             0x4800000000ULL
 #define CONFIG_SYS_PCIE3_PHYS_ADDR             0x5000000000ULL
 /* LUT registers */
+#ifdef CONFIG_LS1012A
+#define PCIE_LUT_BASE                          0xC0000
+#else
 #define PCIE_LUT_BASE                          0x10000
+#endif
 #define PCIE_LUT_LCTRL0                                0x7F8
 #define PCIE_LUT_DBG                           0x7FC
 
@@ -157,6 +159,13 @@ struct sys_info {
 #define CONFIG_SYS_FSL_FM1_DTSEC1_ADDR         \
                (CONFIG_SYS_IMMR + CONFIG_SYS_FSL_FM1_DTSEC1_OFFSET)
 
+#define CONFIG_SYS_FSL_SEC_OFFSET              0x700000ull
+#define CONFIG_SYS_FSL_JR0_OFFSET              0x710000ull
+#define CONFIG_SYS_FSL_SEC_ADDR \
+       (CONFIG_SYS_IMMR + CONFIG_SYS_FSL_SEC_OFFSET)
+#define CONFIG_SYS_FSL_JR0_ADDR \
+       (CONFIG_SYS_IMMR + CONFIG_SYS_FSL_JR0_OFFSET)
+
 /* Device Configuration and Pin Control */
 struct ccsr_gur {
        u32     porsr1;         /* POR status 1 */