* OMAP HSMMC register definitions
*/
#define OMAP_HSMMC1_BASE 0x48060100
-#define OMAP_HSMMC2_BASE 0x481D8000
-#define OMAP_HSMMC3_BASE 0x47C24000
+#define OMAP_HSMMC2_BASE 0x481D8100
typedef struct hsmmc {
unsigned char res1[0x10];
#define INDEX_MASK (0x3f << 24)
#define INDEX(i) (i << 24)
#define DATI_MASK (0x1 << 1)
-#define DATI_CMDDIS (0x1 << 1)
+#define CMDI_MASK (0x1 << 0)
#define DTW_1_BITMODE (0x0 << 1)
#define DTW_4_BITMODE (0x1 << 1)
#define DTW_8_BITMODE (0x1 << 5) /* CON[DW8]*/
#define mmc_reg_out(addr, mask, val)\
writel((readl(addr) & (~(mask))) | ((val) & (mask)), (addr))
-int omap_mmc_init(int dev_index);
+int omap_mmc_init(int dev_index, uint host_caps_mask, uint f_max);
#endif /* MMC_HOST_DEF_H */