sunxi: Use BROM stored boot_media value to determine our boot-source

[oweals/u-boot.git] / arch / arm / include / asm / arch-am33xx / ddr_defs.h

diff --git a/arch/arm/include/asm/arch-am33xx/ddr_defs.h b/arch/arm/include/asm/arch-am33xx/ddr_defs.h
index fbe599d1ab36444cc62ab38609a26dca2149a7e4..43e122e261916cf3f0a2e4d917b5a2f95f59c66f 100644 (file)
--- a/arch/arm/include/asm/arch-am33xx/ddr_defs.h
+++ b/arch/arm/include/asm/arch-am33xx/ddr_defs.h
@@ -33,11 +33,7 @@
 #define MT47H128M16RT25E_EMIF_SDCFG            0x41805332
 #define MT47H128M16RT25E_EMIF_SDREF            0x0000081a
 #define MT47H128M16RT25E_RATIO                 0x80
-#define MT47H128M16RT25E_INVERT_CLKOUT         0x00
 #define MT47H128M16RT25E_RD_DQS                        0x12
-#define MT47H128M16RT25E_WR_DQS                        0x00
-#define MT47H128M16RT25E_PHY_WRLVL             0x00
-#define MT47H128M16RT25E_PHY_GATELVL           0x00
 #define MT47H128M16RT25E_PHY_WR_DATA           0x40
 #define MT47H128M16RT25E_PHY_FIFO_WE           0x80
 #define MT47H128M16RT25E_IOCTRL_VALUE          0x18B
@@ -58,6 +54,37 @@
 #define MT41J128MJT125_PHY_FIFO_WE             0x100
 #define MT41J128MJT125_IOCTRL_VALUE            0x18B
 
+/* Micron MT41J128M16JT-125 at 400MHz*/
+#define MT41J128MJT125_EMIF_READ_LATENCY_400MHz        0x100007
+#define MT41J128MJT125_EMIF_TIM1_400MHz                0x0AAAD4DB
+#define MT41J128MJT125_EMIF_TIM2_400MHz                0x26437FDA
+#define MT41J128MJT125_EMIF_TIM3_400MHz                0x501F83FF
+#define MT41J128MJT125_EMIF_SDCFG_400MHz       0x61C052B2
+#define MT41J128MJT125_EMIF_SDREF_400MHz       0x00000C30
+#define MT41J128MJT125_ZQ_CFG_400MHz           0x50074BE4
+#define MT41J128MJT125_RATIO_400MHz            0x80
+#define MT41J128MJT125_INVERT_CLKOUT_400MHz    0x0
+#define MT41J128MJT125_RD_DQS_400MHz           0x3A
+#define MT41J128MJT125_WR_DQS_400MHz           0x3B
+#define MT41J128MJT125_PHY_WR_DATA_400MHz      0x76
+#define MT41J128MJT125_PHY_FIFO_WE_400MHz      0x96
+
+/* Micron MT41K128M16JT-187E */
+#define MT41K128MJT187E_EMIF_READ_LATENCY      0x06
+#define MT41K128MJT187E_EMIF_TIM1              0x0888B3DB
+#define MT41K128MJT187E_EMIF_TIM2              0x36337FDA
+#define MT41K128MJT187E_EMIF_TIM3              0x501F830F
+#define MT41K128MJT187E_EMIF_SDCFG             0x61C04AB2
+#define MT41K128MJT187E_EMIF_SDREF             0x0000093B
+#define MT41K128MJT187E_ZQ_CFG                 0x50074BE4
+#define MT41K128MJT187E_RATIO                  0x40
+#define MT41K128MJT187E_INVERT_CLKOUT          0x1
+#define MT41K128MJT187E_RD_DQS                 0x3B
+#define MT41K128MJT187E_WR_DQS                 0x85
+#define MT41K128MJT187E_PHY_WR_DATA            0xC1
+#define MT41K128MJT187E_PHY_FIFO_WE            0x100
+#define MT41K128MJT187E_IOCTRL_VALUE           0x18B
+
 /* Micron MT41J64M16JT-125 */
 #define MT41J64MJT125_EMIF_SDCFG               0x61C04A32