writel(0x00000000, &aips2->opacr3);
writel(0x00000000, &aips2->opacr4);
- if (is_cpu_type(MXC_CPU_MX6SX) || is_soc_type(MXC_SOC_MX7))
- {
+ if (is_mx6ull() || is_mx6sx() || is_mx7()) {
/*
* Set all MPROTx to be non-bufferable, trusted for R/W,
* not forced to user-mode.
writew(enable, &wdog1->wmcr);
writew(enable, &wdog2->wmcr);
- if (is_cpu_type(MXC_CPU_MX6SX) || is_cpu_type(MXC_CPU_MX6UL) ||
- is_soc_type(MXC_SOC_MX7))
+ if (is_mx6sx() || is_mx6ul() || is_mx7())
writew(enable, &wdog3->wmcr);
#ifdef CONFIG_MX7D
writew(enable, &wdog4->wmcr);
writel(val, &src_regs->scr);
}
+#ifdef CONFIG_CMD_BMODE
void boot_mode_apply(unsigned cfg_val)
{
unsigned reg;
reg &= ~(1 << 28);
writel(reg, &psrc->gpr10);
}
+#endif
+
+#if defined(CONFIG_MX6)
+u32 imx6_src_get_boot_mode(void)
+{
+ if (imx6_is_bmode_from_gpr9())
+ return readl(&src_base->gpr9);
+ else
+ return readl(&src_base->sbmr1);
+}
+#endif