ARM: dts: keystone-k2g-evm: Enable I2C0 and I2C1

[oweals/u-boot.git] / arch / arm / imx-common / init.c

diff --git a/arch/arm/imx-common/init.c b/arch/arm/imx-common/init.c
index 15dab1d904239accc3676956ec5a8acbf3d8e444..5b4f82865751629a92b6deeebd1797acadb75585 100644 (file)
--- a/arch/arm/imx-common/init.c
+++ b/arch/arm/imx-common/init.c
@@ -44,7 +44,7 @@ void init_aips(void)
        writel(0x00000000, &aips2->opacr3);
        writel(0x00000000, &aips2->opacr4);
 
-       if (is_cpu_type(MXC_CPU_MX6SX) || is_soc_type(MXC_SOC_MX7)) {
+       if (is_mx6ull() || is_mx6sx() || is_mx7()) {
                /*
                 * Set all MPROTx to be non-bufferable, trusted for R/W,
                 * not forced to user-mode.
@@ -78,8 +78,7 @@ void imx_set_wdog_powerdown(bool enable)
        writew(enable, &wdog1->wmcr);
        writew(enable, &wdog2->wmcr);
 
-       if (is_cpu_type(MXC_CPU_MX6SX) || is_cpu_type(MXC_CPU_MX6UL) ||
-                       is_soc_type(MXC_SOC_MX7))
+       if (is_mx6sx() || is_mx6ul() || is_mx7())
                writew(enable, &wdog3->wmcr);
 #ifdef CONFIG_MX7D
        writew(enable, &wdog4->wmcr);
@@ -116,3 +115,13 @@ void boot_mode_apply(unsigned cfg_val)
        writel(reg, &psrc->gpr10);
 }
 #endif
+
+#if defined(CONFIG_MX6)
+u32 imx6_src_get_boot_mode(void)
+{
+       if (imx6_is_bmode_from_gpr9())
+               return readl(&src_base->gpr9);
+       else
+               return readl(&src_base->sbmr1);
+}
+#endif