arm: dts: ls1028a: add lpuart nodes

[oweals/u-boot.git] / arch / arm / dts / zynqmp-zcu102-rev1.0.dts

diff --git a/arch/arm/dts/zynqmp-zcu102-rev1.0.dts b/arch/arm/dts/zynqmp-zcu102-rev1.0.dts
index 323a674e3a62f3aef69c21a8fe2ff641be646801..d508f3359943f198f15b7ed65ef27a4124bb3faa 100644 (file)
--- a/arch/arm/dts/zynqmp-zcu102-rev1.0.dts
+++ b/arch/arm/dts/zynqmp-zcu102-rev1.0.dts
@@ -1,11 +1,10 @@
+// SPDX-License-Identifier: GPL-2.0+
 /*
  * dts file for Xilinx ZynqMP ZCU102 Rev1.0
  *
- * (C) Copyright 2016, Xilinx, Inc.
+ * (C) Copyright 2016 - 2020, Xilinx, Inc.
  *
  * Michal Simek <michal.simek@xilinx.com>
- *
- * SPDX-License-Identifier:    GPL-2.0+
  */
 
 #include "zynqmp-zcu102-revB.dts"
@@ -15,23 +14,23 @@
        compatible = "xlnx,zynqmp-zcu102-rev1.0", "xlnx,zynqmp-zcu102", "xlnx,zynqmp";
 };
 
-&eeprom  {
+&eeprom {
        #address-cells = <1>;
        #size-cells = <1>;
 
-       board_sn: board_sn@0 {
+       board_sn: board-sn@0 {
                reg = <0x0 0x14>;
        };
 
-       eth_mac: eth_mac@20 {
+       eth_mac: eth-mac@20 {
                reg = <0x20 0x6>;
        };
 
-       board_name: board_name@d0 {
+       board_name: board-name@d0 {
                reg = <0xd0 0x6>;
        };
 
-       board_revision: board_revision@e0 {
+       board_revision: board-revision@e0 {
                reg = <0xe0 0x3>;
        };
 };