arm64: zynqmp: Use ethernet-phy as node name for ethernet phys
[oweals/u-boot.git] / arch / arm / dts / zynqmp-zc1751-xm016-dc2.dts
index 3fdfcc8a11ae87cae50f0408a349eea93f6ce025..b8cc5ed22e6178172d0dc58bdf7efff0678fbd49 100644 (file)
@@ -1,17 +1,16 @@
+// SPDX-License-Identifier: GPL-2.0+
 /*
  * dts file for Xilinx ZynqMP zc1751-xm016-dc2
  *
- * (C) Copyright 2015, Xilinx, Inc.
+ * (C) Copyright 2015 - 2018, Xilinx, Inc.
  *
  * Michal Simek <michal.simek@xilinx.com>
- *
- * SPDX-License-Identifier:    GPL-2.0+
  */
 
 /dts-v1/;
 
 #include "zynqmp.dtsi"
-#include "zynqmp-clk.dtsi"
+#include "zynqmp-clk-ccf.dtsi"
 
 / {
        model = "ZynqMP zc1751-xm016-dc2 RevA";
@@ -36,7 +35,7 @@
                stdout-path = "serial0:115200n8";
        };
 
-       memory {
+       memory@0 {
                device_type = "memory";
                reg = <0x0 0x0 0x0 0x80000000>, <0x8 0x00000000 0x0 0x80000000>;
        };
        status = "okay";
 };
 
-/* fpd_dma clk 667MHz, lpd_dma 500MHz */
 &fpd_dma_chan1 {
        status = "okay";
-       xlnx,include-sg; /* for testing purpose */
-       xlnx,overfetch; /* for testing purpose */
-       xlnx,ratectrl = <0>; /* for testing purpose */
-       xlnx,src-issue = <31>;
 };
 
 &fpd_dma_chan2 {
        status = "okay";
-       xlnx,ratectrl = <100>; /* for testing purpose */
-       xlnx,src-issue = <4>; /* for testing purpose */
 };
 
 &fpd_dma_chan3 {
@@ -71,7 +63,6 @@
 
 &fpd_dma_chan4 {
        status = "okay";
-       xlnx,include-sg; /* for testing purpose */
 };
 
 &fpd_dma_chan5 {
@@ -80,7 +71,6 @@
 
 &fpd_dma_chan6 {
        status = "okay";
-       xlnx,include-sg; /* for testing purpose */
 };
 
 &fpd_dma_chan7 {
 
 &fpd_dma_chan8 {
        status = "okay";
-       xlnx,include-sg; /* for testing purpose */
 };
 
 &gem2 {
        status = "okay";
-       local-mac-address = [00 0a 35 00 02 90];
        phy-handle = <&phy0>;
        phy-mode = "rgmii-id";
-       phy0: phy@5 {
+       phy0: ethernet-phy@5 {
                reg = <5>;
                ti,rx-internal-delay = <0x8>;
                ti,tx-internal-delay = <0xa>;
 &spi0 {
        status = "okay";
        num-cs = <1>;
-       spi0_flash0: spi0_flash0@0 {
-               compatible = "m25p80";
+       spi0_flash0: flash@0 {
                #address-cells = <1>;
                #size-cells = <1>;
+               compatible = "sst,sst25wf080", "jedec,spi-nor";
                spi-max-frequency = <50000000>;
                reg = <0>;
 
-               spi0_flash0@00000000 {
-                       label = "spi0_flash0";
+               partition@0 {
+                       label = "data";
                        reg = <0x0 0x100000>;
                };
        };
 &spi1 {
        status = "okay";
        num-cs = <1>;
-       spi1_flash0: spi1_flash0@0 {
-               compatible = "mtd_dataflash";
+       spi1_flash0: flash@0 {
                #address-cells = <1>;
                #size-cells = <1>;
+               compatible = "atmel,at45db041e", "atmel,at45", "atmel,dataflash";
                spi-max-frequency = <20000000>;
                reg = <0>;
 
-               spi1_flash0@00000000 {
-                       label = "spi1_flash0";
+               partition@0 {
+                       label = "data";
                        reg = <0x0 0x84000>;
                };
        };
 /* ULPI SMSC USB3320 */
 &usb1 {
        status = "okay";
+};
+
+&dwc3_1 {
+       status = "okay";
        dr_mode = "host";
 };