arm64: dts: sun50i: Add support for A64 OLinuXino (with eMMC)

[oweals/u-boot.git] / arch / arm / dts / zynqmp-clk.dtsi

diff --git a/arch/arm/dts/zynqmp-clk.dtsi b/arch/arm/dts/zynqmp-clk.dtsi
index aa848c864637164d7175d1b96ea428562afc435e..c70f85a43020975153d0425e693fe923034c3aaa 100644 (file)
--- a/arch/arm/dts/zynqmp-clk.dtsi
+++ b/arch/arm/dts/zynqmp-clk.dtsi
@@ -1,14 +1,13 @@
+// SPDX-License-Identifier: GPL-2.0+
 /*
  * Clock specification for Xilinx ZynqMP
  *
- * (C) Copyright 2015, Xilinx, Inc.
+ * (C) Copyright 2015 - 2018, Xilinx, Inc.
  *
  * Michal Simek <michal.simek@xilinx.com>
- *
- * SPDX-License-Identifier:    GPL-2.0+
  */
 
-&amba {
+/ {
        clk100: clk100 {
                compatible = "fixed-clock";
                #clock-cells = <0>;
@@ -26,6 +25,7 @@
                compatible = "fixed-clock";
                #clock-cells = <0>;
                clock-frequency = <200000000>;
+               u-boot,dm-pre-reloc;
        };
 
        clk250: clk250 {
@@ -38,6 +38,7 @@
                compatible = "fixed-clock";
                #clock-cells = <0>;
                clock-frequency = <300000000>;
+               u-boot,dm-pre-reloc;
        };
 
        clk600: clk600 {
@@ -218,6 +219,10 @@
        clocks = <&clk250>, <&clk250>;
 };
 
+&watchdog0 {
+       clocks = <&clk100>;
+};
+
 &xilinx_drm {
        clocks = <&drm_clock>;
 };