ARM: dts: sama5d2: Add uart4 definition

[oweals/u-boot.git] / arch / arm / dts / zynq-zybo.dts

diff --git a/arch/arm/dts/zynq-zybo.dts b/arch/arm/dts/zynq-zybo.dts
index fbbb8911910bcd1905f60811aa582966f16b3133..0ac54ebbdc8b478f5220f7cc5391044b2b1ffd22 100644 (file)
--- a/arch/arm/dts/zynq-zybo.dts
+++ b/arch/arm/dts/zynq-zybo.dts
@@ -1,16 +1,13 @@
+// SPDX-License-Identifier: GPL-2.0+
 /*
- * Digilent ZYBO board DTS
- *
  *  Copyright (C) 2011 - 2015 Xilinx
  *  Copyright (C) 2012 National Instruments Corp.
- *
- * SPDX-License-Identifier:    GPL-2.0+
  */
 /dts-v1/;
 #include "zynq-7000.dtsi"
 
 / {
-       model = "Zynq ZYBO Development Board";
+       model = "Digilent Zybo board";
        compatible = "digilent,zynq-zybo", "xlnx,zynq-7000";
 
        aliases {
@@ -20,19 +17,20 @@
                mmc0 = &sdhci0;
        };
 
-       memory {
+       memory@0 {
                device_type = "memory";
                reg = <0x0 0x20000000>;
        };
 
        chosen {
-               bootargs = "earlyprintk";
+               bootargs = "";
                stdout-path = "serial0:115200n8";
        };
 
        usb_phy0: phy0 {
-               compatible = "usb-nop-xceiv";
                #phy-cells = <0>;
+               compatible = "usb-nop-xceiv";
+               reset-gpios = <&gpio0 46 1>;
        };
 };
 
@@ -47,20 +45,21 @@
 
        ethernet_phy: ethernet-phy@0 {
                reg = <0>;
+               device_type = "ethernet-phy";
        };
 };
 
-&sdhci0 {
+&qspi {
        u-boot,dm-pre-reloc;
        status = "okay";
 };
 
-&uart1 {
+&sdhci0 {
        u-boot,dm-pre-reloc;
        status = "okay";
 };
 
-&qspi {
+&uart1 {
        u-boot,dm-pre-reloc;
        status = "okay";
 };