Merge git://git.denx.de/u-boot-i2c
[oweals/u-boot.git] / arch / arm / dts / zynq-7000.dtsi
index b618a3f484f0e507948bdff1017cc01ec40a4e26..f993e19ef2801d374c9b4e654626d5b9682caca6 100644 (file)
@@ -6,16 +6,17 @@
  *
  * SPDX-License-Identifier:    GPL-2.0+
  */
-/include/ "skeleton.dtsi"
 
 / {
+       #address-cells = <1>;
+       #size-cells = <1>;
        compatible = "xlnx,zynq-7000";
 
        cpus {
                #address-cells = <1>;
                #size-cells = <0>;
 
-               cpu@0 {
+               cpu0: cpu@0 {
                        compatible = "arm,cortex-a9";
                        device_type = "cpu";
                        reg = <0>;
@@ -29,7 +30,7 @@
                        >;
                };
 
-               cpu@1 {
+               cpu1: cpu@1 {
                        compatible = "arm,cortex-a9";
                        device_type = "cpu";
                        reg = <1>;
                };
        };
 
-       pmu {
+       fpga_full: fpga-full {
+               compatible = "fpga-region";
+               fpga-mgr = <&devcfg>;
+               #address-cells = <1>;
+               #size-cells = <1>;
+               ranges;
+       };
+
+       pmu@f8891000 {
                compatible = "arm,cortex-a9-pmu";
                interrupts = <0 5 4>, <0 6 4>;
                interrupt-parent = <&intc>;
                reg = < 0xf8891000 0x1000 0xf8893000 0x1000 >;
        };
 
-       regulator_vccpint: fixedregulator@0 {
+       regulator_vccpint: fixedregulator {
                compatible = "regulator-fixed";
                regulator-name = "VCCPINT";
                regulator-min-microvolt = <1000000>;
                        interrupts = <0 26 4>;
                        clocks = <&clkc 25>, <&clkc 34>;
                        clock-names = "ref_clk", "pclk";
-                       spi-max-frequency = <166666700>;
                        #address-cells = <1>;
                        #size-cells = <0>;
                };
                        interrupts = <0 49 4>;
                        clocks = <&clkc 26>, <&clkc 35>;
                        clock-names = "ref_clk", "pclk";
-                       spi-max-frequency = <166666700>;
                        #address-cells = <1>;
                        #size-cells = <0>;
                };
                };
 
                slcr: slcr@f8000000 {
+                       u-boot,dm-pre-reloc;
                        #address-cells = <1>;
                        #size-cells = <1>;
                        compatible = "xlnx,zynq-slcr", "syscon", "simple-mfd";
                        reg = <0xF8000000 0x1000>;
                        ranges;
                        clkc: clkc@100 {
+                               u-boot,dm-pre-reloc;
                                #clock-cells = <1>;
                                compatible = "xlnx,ps7-clkc";
                                fclk-enable = <0>;